Sequence Alignment with Traceback on Reconfigurable Hardware

Lloyd, Scott; Snell, Quinn

doi:10.1109/reconfig.2008.30

Cited by 10 publications

(13 citation statements)

References 20 publications

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“…We get the following conclusions: (1) compared to hardware SW alignment with backtracking [12,14,20], our implementation is able to implement larger PE array and obtains higher frequency and performance. (2) Compared to other hardware SW implementations without backtracking, our comprehensive computing performance is also superior to others obviously.…”

Section: Performance Comparison With Fpga Platformsmentioning

confidence: 75%

“…Most GPU-based SW implementations [28,29,37] adopt intra-task parallelization and focus on memory access optimization. All FPGA-based SW implementations [6][7][8][9][10][11][12][13][14][15][16][17][18][19][20] use the systolic array architecture as the basis for their designs. However, those implementations either simplify the scoring rules, or only take into account the scoring matrix calculations, or only support small scale sequence alignment with specific sequence type and scoring model.…”

Section: Discussionmentioning

confidence: 99%

“…After that, TomVan Court [12] and Benkrid [14] implemented the parameterized SW algorithm accelerator by choosing different sequence types and scoring rules. In addition, Scott Lloyd [20] implemented the scoring and backtracking stage for small scale sequence alignment on FPGA chip, but only support the specific sequence type and scoring model.…”

mentioning

confidence: 99%

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FPGASW: Accelerating Large-Scale Smith–Waterman Sequence Alignment Application with Backtracking on FPGA Linear Systolic Array

Xia

Zou

Liu

et al. 2017

Interdiscip Sci Comput Life Sci

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The Smith-Waterman (SW) algorithm based on dynamic programming is a well-known classical method for high precision sequence matching and has become the gold standard to evaluate sequence alignment software. In this paper, we propose fine-grained parallelized SW algorithms using affine gap penalty and implement a parallel computing structures to accelerating the SW with backtracking on FPGA platform. We analysis the dynamic parallel computing features of anti-diagonal elements and storage expansion problem resulting from backtracking stage, and propose a series of optimization strategies to eliminate data dependency, reduce storage requirements, and overlap memory access latency. Our implementation is capable of supporting multi-type, large-scale biological sequence alignment applications. We obtain a speedup between 3.6 and 25.2 over the typical SW algorithm running on a general-purpose computer configured with an Intel Core i5 3.2 GHz CPU. Moreover, our work is superior to other FPGA implementations in both array size and clock frequency, and the experiment results show that it can get a performance closed to that of the latest GPU implementation, but the power consumption is only about 26% of that of the GPU platforms.

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Section: Performance Comparison With Fpga Platformsmentioning

confidence: 75%

Section: Discussionmentioning

confidence: 99%

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FPGASW: Accelerating Large-Scale Smith–Waterman Sequence Alignment Application with Backtracking on FPGA Linear Systolic Array

Xia

Zou

Liu

et al. 2017

Interdiscip Sci Comput Life Sci

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show abstract

“…When two DNA strands are separated by an enzyme, a single strand messenger RNA, complementary to DNA strand, is formed by mapping from DNA sequences, which consist of A, T, C, G, to complementary RNA sequences, which consist of U, A, G, C. These process noncoding segments, called introns in DNA sequences, are removed by splicing and remaining segments that encode information for protein synthesis, called exons, are assembled in mRNA [10]. [10] DNA and RNA both share common codons; A, G, C. DNA has an additional T codon whereas RNA has an additional U codon.…”

Section: Dna Translation Transcriptionmentioning

confidence: 99%

“…[10] DNA and RNA both share common codons; A, G, C. DNA has an additional T codon whereas RNA has an additional U codon. Both these additional codons are used to form proteins.…”

Section: Dna Translation Transcriptionmentioning

confidence: 99%

Data Encryption Using Bio Molecular Information

Bazli¹,

Tuncel²,

Llewellyn‐Jones³

2014

IJCIS

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Cryptography is a field, which makes the transmitted message unreadable to unauthorised users. In this work we take inspiration from DNA encryption schemes and use of biological alphabets to manipulate information by employing the DNA sequence reaction, to autonomously make a copy of its threads as an extended encryption key. Information is converted from plain text to several formats and then follows the stages of protein formation from DNA sequences to generate an extended key using chemical property and attributes to be used in encryption mechanism. This technique will enhance the security of the encryption mechanism by substitution, manipulation, and complexity. Furthermore this technique can be used in many applications of information and communication systems as well as adding more complexity to existing encryption algorithms.

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Configurable and scalable class of high performance hardware accelerators for simultaneous DNA sequence alignment

Sebastiao

Roma

Flores

2012

Concurrency and Computation

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A new class of efficient and flexible hardware accelerators for DNA local sequence alignment based on the widely used Smith-Waterman algorithm is proposed in this paper. This new class of accelerating structures exploits an innovative technique that tracks the origin coordinates of the best alignment to allow a significant reduction of the size of the dynamic programming matrix that needs to be recomputed during the subsequent traceback phase, providing a considerable reduction of the resulting time and memory requirements. The significant performance of the enhanced class of accelerators is attained by also providing support for an additional level of parallelism: the capability to concurrently align several query sequences with one or more reference sequences, according to the specific application requisites. Moreover, the accelerator class also includes specially designed processing elements that improve the resource usage when implemented in a Field Programmable Gate Array (FPGA), and easily provide several different configurations in an Application Specific Integrated Circuit (ASIC) implementation. Obtained results demonstrated that speedups as high as 278 can be obtained in ASIC accelerating structures. A FPGA-based prototyping platform, operating at a 40 times lower clock frequency and incorporating a complete alignment embedded system, still provides significant speedups as high as 27, compared with a pure software implementation. Copyright Figure 4. Enhanced architecture of processor element PE i .Therefore, considering that in most practical setups, there is a very significant number of shortread sequences that must be aligned, or there are several medium-sized query sequences to be aligned to different reference sequences, alternative arrangements of the available PEs are now proposed to maximally use the whole set of implemented PEs and perform several alignments at the same time. Hence, besides the typical single-stream operation mode, in which one query sequence is aligned to one reference sequence, the class of accelerator architectures that is now proposed possesses the capability to be easily reconfigured to operate in several multiple-stream modes: Single-Reference Multiple-Query (SRMQ) or Multiple-Reference Multiple-Query (MRMQ). This new feature significantly improves the actual performance of the array, because it allows a higher PE occupancy rate with the consequent increase on the achieved array throughput and leading to a greater speedup than would be achieved with just a single array. Single-Reference Multiple-Query operation modeWhen the alignment of various short-read sequences with the same large reference sequence is considered, it is possible to optimize the performance of the proposed accelerator architecture by N. SEBASTIÃO, N. ROMA AND P. FLORES instance, it is possible to implement an accelerator on the basis of the SRMQ mode of operation by considering specific score and coordinates resolutions. FPGAs also allow the implementation of PE versions specifically optimized for a g...

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Sequence Alignment with Traceback on Reconfigurable Hardware

Cited by 10 publications

References 20 publications

FPGASW: Accelerating Large-Scale Smith–Waterman Sequence Alignment Application with Backtracking on FPGA Linear Systolic Array

FPGASW: Accelerating Large-Scale Smith–Waterman Sequence Alignment Application with Backtracking on FPGA Linear Systolic Array

Data Encryption Using Bio Molecular Information

Configurable and scalable class of high performance hardware accelerators for simultaneous DNA sequence alignment

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