Sequential test decompressors with fast variable wide spreading

Abstract

Usually, test pattern decompressors with dynamic reseeding are reset before starting a new test patwith test vectors that have lower decodability as the number of free variables is limited by the test access mechanism bandwidth. We have found that it is possible to increase the number of free variables in the equations describing the care bits encoding by fast creating and wide spreading as many as possible independent linear combinations of the tester bits and using them for the scan chain loading. We propose a decompressor combining a combinational linear decompressor and an LFSR like automaton that effectively distributes the free variables within the test pattern. The proposed test pattern decompressor outperforms the decodability of other decompressors with similar hardware overhead and it reduces the test time due to a possible reduction of the decompressor preloading.

Preventing Scan-Based Side-Channel Attacks by Scan Obfuscating with a Configurable Shift Register

“…Based on this, many countermeasures are put forward to counter the scan-based attacks [35][36][37][38][39][40][41][42][43][44]. Previously, the existing advanced DFT architecture includes test response compactor, X-masker [45,46], and X-tolerance [47,48].…”

Enhancing Sensor Network Security with Improved Internal Hardware Design

“…Advanced DFT architecture such as on-chip decompressor, on-chip compactor and X-masker [26,27], used to be considered as natural defense against scan based side channel attacks [28]. Recently such architecture has been proved not unassailable [29,30].…”