2021
DOI: 10.32985/ijeces.12.3.1
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Seven-Level Symmetrical Series/Parallel Multilevel Inverter with PWM Technique Using Digital Logic

Abstract: This paper attempts to come up with a proposed configuration of Multilevel inverters with a lesser number of switches that are smaller in size, lesser in cost and with a higher efficiency. Designing an inverter topology with a lesser number of switches and proper control technique is the major challenge. cascaded H-Bridge (CHB) topology are more popular among the existing configurations of multilevel inverters (MLI). Even though it can produce more levels, it needs to accommodate a huge number of switches for … Show more

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Cited by 6 publications
(4 citation statements)
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“…therefore, for the same number of output levels,we can see that the new topology generates a lower rate of harmonics than the topology proposed by [18], we constat that the new proposed topology generate a rate of current harmonics lower than the topology proposed by N.Motaparthi and all. in the two cases of study (without filter THDI=6.47% , with THDI= 2.89% filter) [22]. The Table 3 below The design goals of PWM inverters are to reduce the THD in the output current and voltage.…”
Section: B the Multi-carrier Pwm Controlmentioning
confidence: 99%
“…therefore, for the same number of output levels,we can see that the new topology generates a lower rate of harmonics than the topology proposed by [18], we constat that the new proposed topology generate a rate of current harmonics lower than the topology proposed by N.Motaparthi and all. in the two cases of study (without filter THDI=6.47% , with THDI= 2.89% filter) [22]. The Table 3 below The design goals of PWM inverters are to reduce the THD in the output current and voltage.…”
Section: B the Multi-carrier Pwm Controlmentioning
confidence: 99%
“…The insertion of the SC cell into the H-bridge inverter helps to increase output voltage and inverter levels. Instead of using double input sources as in [24,25], the capacitor cell in this work behaves as an additional input source. Increasing the inverter level leads to a reduction in the THD, which is desirable for achieving a sinusoidal output.…”
Section: Introductionmentioning
confidence: 99%
“…Similar to the work suggested in [25], this work uses the series to parallel the configuration to achieve a 7L MLI with the least number of input sources and switches.…”
mentioning
confidence: 99%
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