Shared memory implementation of a parallel switch-level circuit simulator

Rapid progress in the design of fast CPU chips has outstripped progress in memory and cache performance. Optimistic algorithms would seem to be more vulnerable to poor memory performance because they require extra memory for state saving and anti-messages. We examine the performance of both optimistic and conservative protocols in controlled experiments to evaluate the effects of memory speed and cache size, using a variety of applications.

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“…Per-pair channel variables are directly modified [5], without locking, instead of sending explicit null messages.…”

Section: Compose (Conservative Optimistic and Mixedmentioning

confidence: 99%

Slow memory: the rising cost of optimism

Meyer¹,

Martin²,

Bagrodia³

Proceedings Fourteenth Workshop on Parallel and Distributed Simulation

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Parallel shared-memory simulator performance for large ATM networks

Unger

Xiao

Cleary

et al. 2000

ACM Trans. Model. Comput. Simul.

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A performance comparison between an optimistic and a conservative parallel simulation kernel is presented. Performance of the parallel kernels is also compared to a central-event-list sequential kernel. A spectrum of ATM network and traffic scenarios representative of those used by ATM networking researchers are used for the comparison. Experiments are conducted with a cell-level ATM network simulator and an 18-processor SGI PowerChallenge shared-memory multiprocessor. The results show the performance advantages of parallel simulation ove r sequential simulation for ATM networks. Speedups of 4-5 relative to a fast sequential kernel are achieved on 16 processors for several large irregular ATM benchmark scenarios and the optimistic kernel achieves 2 to 5 times speedup on all 7 benchmarks. However, the relative performance of the two parallel simulation kernels is dependent on the size of the ATM network, the number of traffic sources, and the traffic source types used in the simulation. For some benchmarks the best single point performance is provided by the conservative kernel even on a single processor. Unfortunately, the conservative kernel performance is susceptible to small changes in the modeling code and is outperformed by the optimistic kernel on 5 of the 7 benchmarks. The optimistic parallel simulation kernel thus provides most robust performance, but its speedup is limited by the overheads of its implementation, which make it approximately half the speed of the sequential kernel on one processor.

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Shared memory implementation of a parallel switch-level circuit simulator

Cited by 2 publications

References 11 publications

Slow memory: the rising cost of optimism

Slow memory: the rising cost of optimism

Parallel shared-memory simulator performance for large ATM networks

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