Si and C emission into the oxide layer during the oxidation of silicon carbide and its influence on the oxidation rate

Hijikata, Yasuto; Asafuji, Ryosuke; Konno, Ryotaro; Akasaka, Yurie; Shinoda, Ryo

doi:10.1063/1.4922536

Cited by 11 publications

(4 citation statements)

References 32 publications

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“…The linear and parabolic regimes have been attributed to reaction- and diffusion-controlled oxidation, respectively. However, both experimental − and computational observations corroborate that the Deal–Grove model fails to predict the time-dependent thickness of oxide during initial oxidation phase, that is, when oxide thickness is smaller than several nanometers.…”

Section: Resultsmentioning

confidence: 88%

Sensitivity of SiC Grain Boundaries to Oxidation

Liu

Szlufarska

2019

J. Phys. Chem. C

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Molecular dynamics simulations of dry oxidation of bicrystals with incoherent and coherent grain boundaries (GBs) in 3C–SiC are performed at 2000 K and the results are compared to oxidation of single-crystal SiC. Oxidation near incoherent GBs is found faster than that in single crystals and in coherent GBs, whereas oxidation of coherent GBs is comparable to that of single crystals. The accelerated oxidation near incoherent GBs is attributed to strain and the presence of under-coordinated Si within the GB region, both of which reduce the positive charge on silicon atoms, making them more reactive with oxygen. Although atoms with similar properties are found in dislocation cores of coherent GBs, dislocation cores are isolated from each other by crystalline regions, which in turn control the rate of oxidation.

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Section: Resultsmentioning

confidence: 88%

Sensitivity of SiC Grain Boundaries to Oxidation

Liu

Szlufarska

2019

J. Phys. Chem. C

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“…The devices treated with N2 and NO gas shows the presence of nitrogen at the SiO2 interface as observed on the peak location inside the SiO2, implying that annealing process only affects the interface and not the physical morphology. Si peak was also observed at the interface due to the migration of Si and C during the thermal oxidation process [11]. The migrated C interstitials into the oxide diffused toward the oxide surface, which react with O2 to form CO2 and evaporated.…”

Section: Resultsmentioning

confidence: 99%

Improvement of Interface Properties for Thermally Oxidized SiC/SiO<sub>2</sub> MOS Capacitor by Post Oxidation Annealing Treatment

Chand

Bera

Singh³

et al. 2023

MSF

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In this work, we report an innovative approach to improve the interface properties of SiC/SiO2 metal oxide semiconductor (MOS) capacitors. High temperature (1350°C) oxidation under different ambient is followed by a combination of post-oxidation annealing (POA) treatments using N2, N2O and NO gases. TOF-SIMS analysis shows silicon and nitrogen peaks near the SiC/SiO2 interface. The silicon peak is attributed to the emission of silicon and carbon atoms during high temperature oxidation. The accumulation of nitrogen is caused by the presence of nitrogen during oxidation or POA. One of the lowest interface-trap densities along with good dielectric strength has been demonstrated with the N2 and NO gas POA treatment.

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“…Annealing in an Ar environment has very little effect on Dit, whereas with NO-annealing, the Dit is reduced significantly as shown in Fig 3 b). It has been suggested that the silicon vacancies (VSi) are formed during thermal oxidation by the emission of silicon, contributing to the large Dit at the SiO2-SiC interface [9]. Recently, µSR was shown to be sensitive to the presence of VSi in 4H-SiC, with VSi enhancing the formation of Mu 0 , resulting in the reduction of the AD [8].…”

Section: Resultsmentioning

confidence: 99%

Depth-Resolved Study of the SiO<sub>2</sub>- SiC Interface Using Low-Energy Muon Spin Rotation Spectroscopy

Kumar

Mendes

Bathen

et al. 2022

MSF

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In this work, the interface between 4H-SiC and thermally grown SiO2 is studied using low energy muon spin rotation (LE-μSR) spectroscopy. Samples oxidized at 1300 °C were annealed in NO or Ar ambience and the effect of the ambience and the annealing temperature on the near interface region is studied in a depth resolved manner. NO-annealing is expected to passivate the defects, resulting in reduction of interface traps, which is confirmed by electrical characterization. Introduction of N during annealing, to the SiC matrix, results in a thin, carrier rich region close to the interface leading to an increase in the diamagnetic asymmetry. Annealing in an inert environment (Ar) seems to have much lesser impact on the electrical signal, however the μSR shows a reduced paramagnetic asymmetry, indicating a narrow region of low mobility at the interface.

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Si and C emission into the oxide layer during the oxidation of silicon carbide and its influence on the oxidation rate

Cited by 11 publications

References 32 publications

Sensitivity of SiC Grain Boundaries to Oxidation

Sensitivity of SiC Grain Boundaries to Oxidation

Improvement of Interface Properties for Thermally Oxidized SiC/SiO<sub>2</sub> MOS Capacitor by Post Oxidation Annealing Treatment

Depth-Resolved Study of the SiO<sub>2</sub>- SiC Interface Using Low-Energy Muon Spin Rotation Spectroscopy

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