Side-Channel Attack on STTRAM Based Cache for Cryptographic Application

Khan, Mohammad Nasim Imtiaz; Bhasin, Shivam; Yuan, Alex; Chattopadhyay, Anupam; Ghosh, Swaroop

doi:10.1109/iccd.2017.14

Cited by 27 publications

(17 citation statements)

References 21 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The results show that the secret key can be retrieved from MRAM write operation traces. proved [84].…”

Section: Sca On Sttrammentioning

confidence: 90%

“…(i) High write current: This can lead to supply noise. Adversary can generate deterministic supply noise and launch a DoS attack [85], fault injection attack [85], information leakage attack [86], and row hammer attack [87]; (ii) Asymmetric [49] write and read current: This can be leveraged to launch side channel attack [81][82][83][84]; (iii) Susceptibility to external fields: An external magnetic field can lead to magnetic orientation flip of MTJ free layer of MTJ which corrupts the data [80]. Adversary can leverage this to launch attacks (e.g., DoS).…”

Section: Nvm Devices and Their Vulnerabilitiesmentioning

confidence: 99%

“…In [84], a differential power analysis (DPA) on STTRAM read/write operation and MRAM read operation is performed. The work used the HD model with Pearson correlation.…”

Section: Sca On Sttrammentioning

confidence: 99%

“…The asymmetry (data dependent) in the I read/ I write current needs to be eliminated to secure the memory against SCA. Data encoding could be one solution [84]. However, note that it can be very sensitive to process variation [113].…”

Section: Countermeasuresmentioning

confidence: 99%

“…Everspin lists the maximum magnetic tolerance for their MRAM chips during write/read/standby to be only ~100 Oe [47]. High and asymmetric write current [79] and long and asymmetric write latency [80] (common in most NVMs) can serve as side channels exposing the number of '1's and '0's in a memory word, weakening the data privacy [80][81][82][83][84].…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Comprehensive Study of Security and Privacy of Emerging Non-Volatile Memories

Khan

Ghosh

2021

JLPEA

Self Cite

View full text Add to dashboard Cite

Several promising non-volatile memories (NVMs) such as magnetic RAM (MRAM), spin-transfer torque RAM (STTRAM), ferroelectric RAM (FeRAM), resistive RAM (RRAM), and phase-change memory (PCM) are being investigated to keep the static leakage within a tolerable limit. These new technologies offer high density and consume zero leakage power and can bridge the gap between processor and memory. The desirable properties of emerging NVMs make them suitable candidates for several applications including replacement of conventional memories. However, their unique characteristics introduce new data privacy and security issues. Some of them are already available in the market as discrete chips or a part of full system implementation. They are considered to become ubiquitous in future computing devices. Therefore, it is important to ensure their security/privacy issues. Note that these NVMs can be considered for cache, main memory, or storage application. They are also suitable to implement in-memory computation which increases system throughput and eliminates von Neumann bottleneck. Compute-capable NVMs impose new security and privacy challenges that are fundamentally different than their storage counterpart. This work identifies NVM vulnerabilities and attack vectors originating from the device level all the way to circuits and systems, considering both storage and compute applications. We also summarize the circuit/system-level countermeasures to make the NVMs robust against security and privacy issues.

show abstract

“…The results show that the secret key can be retrieved from MRAM write operation traces. proved [84].…”

Section: Sca On Sttrammentioning

confidence: 90%

Section: Nvm Devices and Their Vulnerabilitiesmentioning

confidence: 99%

“…In [84], a differential power analysis (DPA) on STTRAM read/write operation and MRAM read operation is performed. The work used the HD model with Pearson correlation.…”

Section: Sca On Sttrammentioning

confidence: 99%

Section: Countermeasuresmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Comprehensive Study of Security and Privacy of Emerging Non-Volatile Memories

Khan

Ghosh

2021

JLPEA

Self Cite

View full text Add to dashboard Cite

show abstract

Security of Emerging Memory Chips

Ferdaus

Rahman

2020

Emerging Topics in Hardware Security

View full text Add to dashboard Cite

SMART: A Secure Magnetoelectric AntifeRromagnet-Based Tamper-Proof Non-Volatile Memory

et al. 2020

View full text Add to dashboard Cite

Data the and tampering are serious concerns as a ackers have aggressively begun to exploit weaknesses in current memory systems to advance their nefarious schemes. e storage industry is moving toward emerging non-volatile memories (NVM), including the spin-transfer torque magnetoresistive random access memory (STT-MRAM) and the phase change memory (PCM), owing to their high density and low power operation. e advent of novel memory technologies has led to new vulnerabilities including data sensitivity to magnetic eld and temperature uctuations and data persistence a er power down. In this paper, we propose SMART: a Secure Magnetoelectric Antiferromagnet-Based Tamper-Proof memory, which leverages unique properties of antiferromagnetic materials and offers dense, on-chip non-volatile storage. SMART memory is not only resilient against data con dentiality a acks seeking to leak sensitive information but also protects data integrity and prevents Denial of Service (DoS) a acks on the memory. It is impervious to power side-channel a acks, which exploit asymmetric reads/writes for '0' and '1' logic levels, and photonic side-channel a acks, which monitor photo-emission signatures from the chip backside. Further, the ultra-low power magnetoelectric switching coupled with the terahertz regime antiferromagnetic dynamics result in ∼ 4 orders lower energy-per-bit and ∼ 3 orders smaller latency for the SMART memory as compared to prior NVMs such as STT-MRAM and PCM.

show abstract

Side-Channel Attack on STTRAM Based Cache for Cryptographic Application

Cited by 27 publications

References 21 publications

Comprehensive Study of Security and Privacy of Emerging Non-Volatile Memories

Comprehensive Study of Security and Privacy of Emerging Non-Volatile Memories

Security of Emerging Memory Chips

SMART: A Secure Magnetoelectric AntifeRromagnet-Based Tamper-Proof Non-Volatile Memory

Contact Info

Product

Resources

About