2003
DOI: 10.1002/cta.230
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Signal flow graph modelling of interleaved buck converters

Abstract: SUMMARYThis paper presents a systematic development of uniÿed signal ow graph model for an interleaved buck converter system operating in continuous inductor current mode. From this signal ow graph small, large-signal and steady-state models are developed, which are useful to study the converter dynamic and steady-state behaviour. Converter performance expressions like steady-state voltage gain, e ciency expressions and other small-signal characteristic transfer functions are derived. Development of uniÿed sig… Show more

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Cited by 11 publications
(11 citation statements)
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“…This practice also improves the distribution the thermal stress of the electronic switches, elevating so the power density without affecting efficiency. Also it allows a faster dynamic response due to the reduced input filter [6]. Section II presents a summary of advantages and disadvantages of the interleaved chopper converter in comparison with other topologies.…”
Section: Introductionmentioning
confidence: 99%
“…This practice also improves the distribution the thermal stress of the electronic switches, elevating so the power density without affecting efficiency. Also it allows a faster dynamic response due to the reduced input filter [6]. Section II presents a summary of advantages and disadvantages of the interleaved chopper converter in comparison with other topologies.…”
Section: Introductionmentioning
confidence: 99%
“…We adapt a graphical loop-gain method to design the RFACBC scheme and analyze the closed-loop performances of the converter [22][23][24][25][26]. In addition, we establish design guidelines for voltage feedback compensation consisted of RFACBC and multistage EA, which can provide good closed-loop performances for high frequency low voltage buck DC-DC converters.…”
Section: Introductionmentioning
confidence: 99%
“…Power converters have to be connected in parallel whenever power conversion is necessary at a higher value of current than what the devices can carry [1][2][3][4][5][6]. By paralleling converters, the inductor current in each phase is reduced, and hence the size of the inductor can be decreased [1,[7][8][9][10].…”
Section: Introductionmentioning
confidence: 99%