2002
DOI: 10.1557/proc-717-c2.5
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Silicon Self-Interstitial Cluster Formation and Dissolution in SOI

Abstract: Silicon-on-insulator (SOI) is a promising alternative to bulk silicon as ultra shallow junction depths have begun to shrink below 50 nm. This study examined the effect of the SOI surface silicon/buried oxide interface on {311} defect evolution after Si+ ion implantation. SOI wafers were produced such that the surface silicon thickness varied from 300Å to 1600Å. Non-amorphizing Si+ implants at 5 and 20 keV with a dose of 2x1014 cm-2 were performed into SOITEC SOI wafers. Furnace anneals were done at 750°C from … Show more

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Cited by 3 publications
(5 citation statements)
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“…The excess oxygen could theoretically serve as traps for interstitials, thus affecting dopant diffusion and interstitial recombination. The current study extends from previous studies 10,11 by investigating the dependence of point defect populations on the type of surface silicon/BOX interface ͑e.g., SIMOX or SOITEC͒, as well as proximity to the interface. This is accomplished by monitoring trapped interstitials within extended defects ͑e.g., ͕311͖ defects and dislocation loops͒.…”
mentioning
confidence: 54%
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“…The excess oxygen could theoretically serve as traps for interstitials, thus affecting dopant diffusion and interstitial recombination. The current study extends from previous studies 10,11 by investigating the dependence of point defect populations on the type of surface silicon/BOX interface ͑e.g., SIMOX or SOITEC͒, as well as proximity to the interface. This is accomplished by monitoring trapped interstitials within extended defects ͑e.g., ͕311͖ defects and dislocation loops͒.…”
mentioning
confidence: 54%
“…A reduction in the initial trapped interstitial concentration has been previously observed for dose losses as low as 6%. 10,11 The previous experiments also showed that an enhancement in the decay rate was not observed without more than a 13% dose loss. The instability of the ͕311͖ defect compared to the dislocation loop is the likely cause of these observations.…”
Section: Discussionmentioning
confidence: 86%
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“…The surface silicon layer of the SOI wafers was thinned using oxidation and etching from 1600 Å down to 670-688 and 299-305 Å, respectively. Figures 3 and 4 show the PTEM micrographs and QTEM data, respectively, from Saavedra et al 3 for the 5 keV samples. The wafers were then implanted with 28 Si ϩ ions at energies ranging from 5 to 40 keV and a constant dose of 2ϫ10 14 cm Ϫ2 .…”
Section: Methodsmentioning
confidence: 99%
“…These include the elimination of latch up, improved radiation hardness, low-power consumption, and higher operating temperatures. 3 Dopant diffusion in SOI has previously been shown to be quite different from that of bulk silicon. 2 In order to scale SOI devices in the future, the diffusion phenomena that take place must be understood so that process simulators can be updated.…”
Section: Introductionmentioning
confidence: 99%