Simplifying HW/SW integration to deploy multiple accelerators for CPU-FPGA heterogeneous platforms

Bragança, Lucas; Alves, Fredy A. M.; Penha, Jeronimo Costa; Coimbra, Gabriel T. P.; Ferreira, Ricardo; Nacif, José Augusto M.

doi:10.1145/3229631.3229651

Cited by 4 publications

(4 citation statements)

References 15 publications

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“…Nevertheless, FPGA programming is still a complex and challenging task. [22][23][24] Although AWS includes an FPGA Developer AMI and Hardware Developer Kit (HDK), it requires design expertise to develop accelerators. Our generators simplify these tasks since the user should only register the accelerator as an Amazon FPGA Image (AFI) performing deployment in just a few clicks.…”

Section: Aws Amazon Fpga F1 Instancesmentioning

confidence: 99%

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Gene regulatory accelerators on cloud FPGA

Penha

Bragança

Canesche

et al. 2023

Concurrency and Computation

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SummaryGene regulatory networks (GRN) are dynamic models in time and space. These models are used to predict diseases and in drugs research. GRN models are discrete, and Boolean graphs can efficiently represent them. However, GRN algorithms explore a large solution space with high computational complexity. This work proposes efficient FPGA‐based accelerators to implement two GRN algorithms: attractor computation and Derrida plot. Nevertheless, FPGA accelerator design and deployment are still a challenge. This work presents an accelerator design framework for AWS Amazon FPGA cloud. The framework simplifies the software (SW) and hardware (HW) generation for GRN accelerators. The user provides a high‐level model for the Boolean GRN, and our tool automatically creates AWS‐ready‐to‐deploy software and hardware components. For the attractor and the Derrida plot computation, the proposed FPGA accelerators are on average and faster than a V100 GPU.

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Section: Aws Amazon Fpga F1 Instancesmentioning

confidence: 99%

“…In this regard, Amazon released instances equipped with Xilinx FPGA boards that enable sharing single or multiple FPGAs in the cloud as a service, efficiently scaling and accelerating HPC applications. Nevertheless, FPGA programming is still a complex and challenging task 22‐24 …”

Section: Introductionmentioning

confidence: 99%

Gene regulatory accelerators on cloud FPGA

Penha

Bragança

Canesche

et al. 2023

Concurrency and Computation

Self Cite

View full text Add to dashboard Cite

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“…The framework provides an API among client applications and FPGA accelerators modules. It also offers an accelerator simulation environment (ASE) [26], a hardware and software co-simulation environment for any Intel FPGA, employed to test and prototype user designs [27]. In addition, the OPAE SDK [28] provides a service-oriented approach to use on user applications [23].…”

Section: High-level Interfaces For Acceleratorsmentioning

confidence: 99%

“…Although OPAE offers higher abstraction, the designer still needs to have substantial knowledge of the underlying hardware details. Moreover, there is a lack of intrinsic support to deploy multiple acceleration modules in the same design, leading to manually instantiate each accelerator in a set of modules [27].…”

Section: High-level Interfaces For Acceleratorsmentioning

confidence: 99%

VirtFun: Function Offload Methodology to Virtualized Environment

Petry¹,

Azevedo²

2020

Computer Science &Amp; Information Technology (CS &Amp; IT)

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The use of virtual machines (VM) has become popular with substantial growth for both personal and commercial use, especially supported by the progress of hardware and software virtualization technologies. There are several reasons for this adoption like: cost, customization, scalability and flexibility. Distinct domains of application, such as scientific, financial and industrial, spanning from embedded to cloud systems, taken advantage of this kind of machines to meet processing computational demands. However, there are setbacks: hardware handling, resources use, performance and management. This growth demands an effective support by the underlying virtualization infrastructure, which directly affects the hosts' capacity in datacenters and cloud environment that support them. It is evident that the host native processing performs better than VMs, especially when using accelerator devices, where the common solution is to assign each device to a specific VM, instead of sharing it among multiples VMs. Beyond performance issues inside the host, we need to consider the VM performance when using accelerator devices. In this context, it is necessary to provide efficient mechanisms to manage and run VMs which can take advantages of high-performance devices, like FPGAs or even from software resources on the host. To assist this challenge, this paper proposes a methodology to improve communication performance of applications running on the VMs, VirtFun. To do so, we developed a framework able to offload pieces of application's code (vFunction) to host by means of secure data sharing between the application and device. The results achieved in our experiments demonstrated significant acceleration capacity for the guest application vFunction. The speedup reached 340% compared to conventional network execution, reaching maximum slowdown of 2.8% in the worst case and near to 0% in the best case considering the native execution.

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