Simulated and measured performance evaluation of RISC-based SoC platforms in network processing applications

Ohlendorf, Rainer; Wild, Thomas; Meitinger, Michael; Rauchfuss, Holm; Herkersdorf, Andreas

doi:10.1016/j.sysarc.2007.01.009

Cited by 14 publications

(8 citation statements)

References 9 publications

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“…All FlexPathspecific hardware modules are running at line-speed with a 32 bit data path at 100 MHz, equivalent to a packet data rate of 3.2 Gbps. In [11] we already described limitations in the memory and interconnect subsystem, limiting the possible data rate of the whole system to 400 Mbps. Nevertheless, transferring our architecture to an ASIC platform, with a more powerful interconnect, more CPUs and a clock frequency above 300 MHz, we should be able to reach data rates of 10 Gbps and more.…”

Section: Discussionmentioning

confidence: 99%

“…This enables a high performance path for simple processing (like IP forwarding) and reduces the latency compared to a processor path, which was already described in [11].…”

Section: A Idea and Conceptmentioning

confidence: 99%

“…The benefits of HW offloading in a FlexPath NP compared to standard NPs has already been investigated in detail by simulations presented in [11].…”

Section: B Architecture and Demonstratormentioning

confidence: 99%

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FlexPath NP - A network processor architecture with flexible processing paths

Meitinger

Ohlendorf

Wild

et al. 2008

2008 International Symposium on System-on-Chip

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In this paper we present a FlexPath Network Processor implementation, a platform with flexible, reconfigurable processing paths for packet processing. The path decision is made in hardware based on a packet's network application. Packets may be processed by a CPU or even completely in hardware. With our demonstrator the performance of different processing paths is shown for a scenario with simple IPv4 forwarding traffic mixed with IPSec packets. We show that flexible path selection significantly improves the system's performance. The specific FlexPath concepts are also applicable to other NP architectures.

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Section: Discussionmentioning

confidence: 99%

“…This enables a high performance path for simple processing (like IP forwarding) and reduces the latency compared to a processor path, which was already described in [11].…”

Section: A Idea and Conceptmentioning

confidence: 99%

See 1 more Smart Citation

FlexPath NP - A network processor architecture with flexible processing paths

Meitinger

Ohlendorf

Wild

et al. 2008

2008 International Symposium on System-on-Chip

Self Cite

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“…For AutoRoute, please refer to [3] for more details on the FlexPath demonstration platform and corresponding results.…”

Section: Demonstratormentioning

confidence: 99%

“…The benefits arising from AutoRoute were already described and analyzed in [2] and [3] in detail. A central question is, how many and which types of packets are true candidates for AutoRoute.…”

Section: Introductionmentioning

confidence: 99%

A Programmable Stream Processing Engine for Packet Manipulation in Network Processors

Meitinger

Ohlendorf

Wild

et al. 2007

IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07)

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In this paper we introduce a programmable stream processing engine working as a co-processor in a Network Processor egress path. By using a special pipelining architecture several generic manipulations can be performed on-the-fly on a packet data stream with line-speed. In two measurement scenarios for IP forwarding and IP tunneling we demonstrate the benefits of the Post-Processor concept compared to a pure software reference implementation.

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