Simulating Hybrid Circuits of Single-Electron Transistors and Field-Effect Transistors

Lientschnig, Günther; Weymann, Ireneusz; Hadley, P.

doi:10.1143/jjap.42.6467

Cited by 74 publications

(50 citation statements)

References 13 publications

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“…Electronic transport in nonmagnetic SETs was already extensively studied in the past two decades [14,15,79,80,81,82,83,84,85,86,87,88,89]. Recently, the attention was also drawn to electron tunnelling in magnetic systems [25,26,73,74,90,91,92], which was stimulated by recent progress in nanotechnology.…”

Section: Ferromagnetic Single-electron Transistors Based On Metallic mentioning

confidence: 99%

Spin effects in single-electron tunnelling

Barnaś¹,

Weymann²

2008

J. Phys.: Condens. Matter

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Abstract. An important consequence of the discovery of giant magnetoresistance in metallic magnetic multilayers is a broad interest in spin dependent effects in electronic transport through magnetic nanostructures. An example of such systems are tunnel junctions -single-barrier planar junctions or more complex ones. In this review we present and discuss recent theoretical results on electron and spin transport through ferromagnetic mesoscopic junctions including two or more barriers. Such systems are also called ferromagnetic single-electron transistors. We start from the situation when the central part of a device has the form of a magnetic (or nonmagnetic) metallic nanoparticle. Transport characteristics reveal then single-electron charging effects, including the Coulomb staircase, Coulomb blockade, and Coulomb oscillations. Single-electron ferromagnetic transistors based on semiconductor quantum dots and large molecules (especially carbon nanotubes) are also considered. The main emphasis is placed on the spin effects due to spin-dependent tunnelling through the barriers, which gives rise to spin accumulation and tunnel magnetoresistance. Spin effects also occur in the current-voltage characteristics, (differential) conductance, shot noise, and others. Transport characteristics in the two limiting situations of weak and strong coupling are of particular interest. In the former case we distinguish between the sequential tunnelling and cotunnelling regimes. In the strong coupling regime we concentrate on the Kondo phenomenon, which in the case of transport through quantum dots or molecules leads to an enhanced conductance and to a pronounced zero-bias Kondo peak in the differential conductance.

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Section: Ferromagnetic Single-electron Transistors Based On Metallic mentioning

confidence: 99%

Spin effects in single-electron tunnelling

Barnaś¹,

Weymann²

2008

J. Phys.: Condens. Matter

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“…It is used as sensitive electrometers 3 or electron pumps allowing to control the transfer of electrons one by one 4,5 . Since then very important efforts have been devoted to fabricate silicon SETs, mostly to integrate SETs together with regular transistors for building logic circuits 6,7 , and more recently for quantum logic experiments with single charge or spin in silicon quantum dots 8,9 . An important challenge is to increase the temperature of operation from the typical sub-kelvin range of original devices up to much higher temperatures.…”

mentioning

confidence: 99%

Simple and controlled single electron transistor based on doping modulation in silicon nanowires

Hofheinz

Jehl

Sanquer

et al. 2006

Applied Physics Letters

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A simple and highly reproducible single electron transistor (SET) has been fabricated using gated silicon nanowires. The structure is a metal-oxide-semiconductor field-effect transistor made on silicon-on-insulator thin films. The channel of the transistor is the Coulomb island at low temperature. Two silicon nitride spacers deposited on each side of the gate create a modulation of doping along the nanowire that creates tunnel barriers. Such barriers are fixed and controlled, like in metallic SETs. The period of the Coulomb oscillations is set by the gate capacitance of the transistor and therefore controlled by lithography. The source and drain capacitances have also been characterized. This design could be used to build more complex SET devices.The first and most common Coulomb blockade device is the Single Electron Transistor (SET) made with metallic leads and island, and tunnel oxide barriers 1,2 . It is used as sensitive electrometers 3 or electron pumps allowing to control the transfer of electrons one by one 4,5 . Since then very important efforts have been devoted to fabricate silicon SETs, mostly to integrate SETs together with regular transistors for building logic circuits 6,7 , and more recently for quantum logic experiments with single charge or spin in silicon quantum dots 8,9 . An important challenge is to increase the temperature of operation from the typical sub-kelvin range of original devices up to much higher temperatures. The required size of the island is of the order of the nm, and therefore out of control of current fabrication processes. Researchers took advantage of natural disorder to create such extremely small islands, mostly with constrictions in disordered thin films 10,11,12,13,14 . More recently 15 undulated thin films have been used, as well as pattern-dependent oxidation 16 .We followed another approach based on etched silicon nanowires without constrictions, as pionnered by Tilke et al. 17 and more recently Namatsu et al. 18 , and also Kim et al. 19 and Fujiwara et al. 20 . In the two first cases the formation of a Coulomb island in a nanowire underneath a very large gate was studied. In the two others two gates were defined above a nanowire, each of them acting as a tunable barrier for entering/exiting the single electron box delimited by these gates. Although this scheme allowed logic operations to be performed at 300K 15,16 , it remains a complex architecture since up to 4 gates are needed for proper operation. Our SET is much simpler since it requires a single gate to define the quantum dot, while the barriers are fixed, like in metallic SETs. Periodic Coulomb blockade is observed, with a period solely determined by the surface area of a single gate. It is therefore controlled by lithography, not by disorder. With current state of the art electron beam lithography the limit in operating temperature is of the order of 10 K. The schematics of our device is essentially similar to the original metallic SETs, the tunnel oxide barriers being re-

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“…SET based inverter which consists of two nominally identical Single-Electron Transistors (SETs) in series that share a common input gate [15]. Each single-electron transistor used in this inverter contains a small aluminum island with a total capacitance C ∑ = 1.6 fF.…”

Section: Single-electron Transistor Logicmentioning

confidence: 99%

“…Each single-electron transistor used in this inverter contains a small aluminum island with a total capacitance C ∑ = 1.6 fF. On comparison of hybrid SET-MOS inverter [16] and inverter composed of pure SET [15], the voltage gain of hybrid SET-MOS inverter (Fig. 4) has been greatly enhanced.…”

Section: Single-electron Transistor Logicmentioning

confidence: 99%

Design and Simulation of NOT and NAND Gate Using Hybrid SET-MOS Technology

2015

IJSR

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Single Electron Transistor (SET) is an advanced technology for future low power VLSI devices. SET has high integration density and a low power consumption device. While building logic circuits that comprise only of SETs, it is observed that the gate voltage at the input must be higher than the power supply of SET for better switching characteristics. This limitation of SET in the power and gate supply voltages makes it practically inappropriate to build circuits. An approach to overcome this problem, hybridization of SET and CMOS transistor is implemented. In this paper, different types of hybrid SET-MOS circuits are designed such as hybrid SET-MOS inverter and NAND gate is designed and implemented. All the circuits are verified by means of PSpice simulation software version 16.5.

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Simulating Hybrid Circuits of Single-Electron Transistors and Field-Effect Transistors

Cited by 74 publications

References 13 publications

Spin effects in single-electron tunnelling

Spin effects in single-electron tunnelling

Simple and controlled single electron transistor based on doping modulation in silicon nanowires

Design and Simulation of NOT and NAND Gate Using Hybrid SET-MOS Technology

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