Simulation based Performance Study of Cache Coherence Protocols

Mallya, Neethu Bal; Patil, Geeta; Raveendran, Biju K.

doi:10.1109/inis.2015.52

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Cited by 5 publications

(2 citation statements)

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“…It has the least hardware complexity among all coherence protocols. Reading/writing in one node invalidates the data in another node if the same data exists [17].…”

Section: B Modified-invalid (Mi)mentioning

confidence: 99%

See 1 more Smart Citation

Cache Coherence Protocols in Distributed Systems

Shukur

Zeebaree

Zebari

et al. 2020

JASTT

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Distributed systems performance is affected significantly by cache coherence protocols due to their role in data consistency maintaining. Also, cache coherent protocols have a great task for keeping the interconnection of caches in a multiprocessor environment. Moreover, the overall performance of distributed shared memory multiprocessor system is influenced by the used cache coherence protocol type. The major challenge of shared memory devices is to maintain the cache coherently. Therefore, in past years many contributions have been presented to address the cache issues and to improve the performance of distributed systems. This paper reviews in a systematic way a number of methods used for the cache-coherent protocols in a distributed system.

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“…It has the least hardware complexity among all coherence protocols. Reading/writing in one node invalidates the data in another node if the same data exists [17].…”

Section: B Modified-invalid (Mi)mentioning

confidence: 99%

“…The major challenge of shared memory devices is to maintain the cache coherent, typically addressed by the hardware cache coherent protocols [16]. coherent failure occurs when updating the local node cache copy and revoking all shared copies to keep the data coherent [17], [18].…”

Section: Introductionmentioning

confidence: 99%