Simulation graphs for reverse engineering

Soeken, Mathias; Sterin, Baruch; Drechsler, Rolf; Brayton, Robert K.

doi:10.1109/fmcad.2015.7542265

Cited by 11 publications

(7 citation statements)

References 14 publications

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“…The verification results are compared with the state-of-the-art approaches presented in [25][19] [20]. For word-level abstraction, our approach is compared with the simulation graph-based technique [22] and computer algebra method of [28]. The comparison with the contemporary formal methods such as SAT, SMT and commercial tools are not provided in this paper; computer algebraic approach has already been shown to be orders of magnitude faster than those techniques [25].…”

Section: Resultsmentioning

confidence: 99%

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Spectral approach to verifying non-linear arithmetic circuits

Yu¹,

Su²,

Yasin³

et al. 2019

Proceedings of the 24th Asia and South Pacific Design Automation Conference

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This paper presents a fast and effective computer algebraic method for analyzing and verifying non-linear integer arithmetic circuits using a novel algebraic spectral model. It introduces a concept of algebraic spectrum, a numerical form of polynomial expression; it uses the distribution of coefficients of the monomials to determine the type of arithmetic function under verification. In contrast to previous works, the proof of functional correctness is achieved by computing an algebraic spectrum combined with local rewriting of word-level polynomials. The speedup is achieved by propagating coefficients through the circuit using And-Inverter Graph (AIG) datastructure. The effectiveness of the method is demonstrated with experiments including standard and Booth multipliers, and other synthesized non-linear arithmetic circuits up to 1024 bits containing over 12 million gates.

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Section: Resultsmentioning

confidence: 99%

“…The techniques that play a major role in synthesis and verification, are abstraction and reverse engineering [22] [28]. Formal verification techniques can benefit greatly from abstracting functionality of the circuits being verified.…”

Section: Introductionmentioning

confidence: 99%

Spectral approach to verifying non-linear arithmetic circuits

Yu¹,

Su²,

Yasin³

et al. 2019

Proceedings of the 24th Asia and South Pacific Design Automation Conference

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“…In [69], simulation vectors are used to deal with the subgraph isomorphism problem. These simulation vectors are made up of one-hot and two-hot vectors that are applied to the inputs of a combinational circuit.…”

Section: Functional Analysismentioning

confidence: 99%

A survey of algorithmic methods in IC reverse engineering

et al. 2021

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The discipline of reverse engineering integrated circuits (ICs) is as old as the technology itself. It grew out of the need to analyze competitor's products and detect possible IP infringements. In recent years, the growing hardware Trojan threat motivated a fresh research interest in the topic. The process of IC reverse engineering comprises two steps: netlist extraction and specification discovery. While the process of netlist extraction is rather well understood and established techniques exist throughout the industry, specification discovery still presents researchers with a plurality of open questions. It therefore remains of particular interest to the scientific community. In this paper, we present a survey of the state of the art in IC reverse engineering while focusing on the specification discovery phase. Furthermore, we list noteworthy existing works on methods and algorithms in the area and discuss open challenges as well as unanswered questions. Therefore, we observe that the state of research on algorithmic methods for specification discovery suffers from the lack of a uniform evaluation approach. We point out the urgent need to develop common research infrastructure, benchmarks, and evaluation metrics. KeywordsHardware reverse engineering • Survey • Boolean function learning • Logical equivalence checking IntroductionReverse engineering of integrated circuits serves a multitude of purposes [32]. For example, understanding the details of a competitor's IC helps to conduct a competitive analysis. Furthermore, patent infringements can be detected by locating the stolen IP in a competitor's IC. In addition, a particularly growing topic in recent years is the detection of hardware B Leonid Azriel

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“…In graph theory, an isomorphism of graphs G and H is a bijection between the vertex sets V (G) and V (F ), f : V (G) → V (F ), such that any two vertices u and v of G are adjacent in G iff f (u) and f (v) are adjacent in H. Besides the mathematical research on graph isomorphism, the algorithmic approach to graph isomorphism has been widely used in computer engineering, e.g. Boolean matching [15] and program similarity checking [16]. In general, graph isomorphism is applicable to undirected, unlabeled, unweighted graphs.…”

Section: Graph Isomorphismmentioning

confidence: 99%

Advanced datapath synthesis using graph isomorphism

Choudhury

Sullivan

et al. 2017

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

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-This paper presents an advanced DAG-based algorithm for datapath synthesis that targets area minimization using logic-level resource sharing. The problem of identifying common specification logic is formulated using unweighted graph isomorphism problem, in contrast to a weighted graph isomorphism using AIGs. In the context of gate-level datapath circuits, our algorithm solves the unweighted graph isomorphism problem in linear time. The experiments are conducted within an industrial synthesis flow that includes the complete high-level synthesis, logic synthesis and placement and route procedures. Experimental results show a significant runtime improvements compared to the existing datapath synthesis algorithms.

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Simulation graphs for reverse engineering

Cited by 11 publications

References 14 publications

Spectral approach to verifying non-linear arithmetic circuits

Spectral approach to verifying non-linear arithmetic circuits

A survey of algorithmic methods in IC reverse engineering

Advanced datapath synthesis using graph isomorphism

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