Simulation study about negative capacitance effects on recessed channel tunnel FET

Abstract

A recessed-channel tunnel field-effect transistor (RCTFET) with intrinsic Si layer between gate and source/drain is proposed and its electrical characteristics are examined by technology computer-aided design simulation for lower subthreshold swing (SS) and higher on-off current ratio (I ON/I OFF) than conventional planar TFET. Although the SS and I ON/I OFF of RCTFET can be improved by optimizing the length of the intrinsic Si layer (L T), there is a trade-off in terms of turn-on voltage (V ON). To address this issue, a ferroelectric (FE) layer has been adopted to the gate stack for negative capacitance (NC) effects. Based on the study, the NC effects not only reduce V ON but also enhance the SS and I ON/I OFF characteristics. As a result, the optimized NC-RCTFET shows 3 times higher I ON and 23 mV dec−1 smaller average SS with 1 V lower V ON than the conventional RCTFET.

Numerical Modelling of Carrier Transport in Organic Field Effect Transistors

“…However, a trade-off between sub threshold swing and the other evaluating parameters starts to appear. Such trade-off was previously reported in literature for other inorganic FET, as in [48].…”