No abstract

No abstract

A recessed-channel tunnel field-effect transistor (RCTFET) with intrinsic Si layer between gate and source/drain is proposed and its electrical characteristics are examined by technology computer-aided design simulation for lower subthreshold swing (SS) and higher on-off current ratio (I ON/I OFF) than conventional planar TFET. Although the SS and I ON/I OFF of RCTFET can be improved by optimizing the length of the intrinsic Si layer (L T), there is a trade-off in terms of turn-on voltage (V ON). To address this issue, a ferroelectric (FE) layer has been adopted to the gate stack for negative capacitance (NC) effects. Based on the study, the NC effects not only reduce V ON but also enhance the SS and I ON/I OFF characteristics. As a result, the optimized NC-RCTFET shows 3 times higher I ON and 23 mV dec−1 smaller average SS with 1 V lower V ON than the conventional RCTFET.

No abstract

In this study, a heterojunction one-transistor (1T) dynamic random-access memory (DRAM) with SiGe body/drain has been proposed and investigated its electrical characteristics by technology computer-aided design simulation. The results reveal that the homojunction between body and drain with a narrow band gap material enhances not only retention characteristic but also write and erase efficiencies compared to those of the structure in which SiGe is only adopted at the body region. Consequently, the sensing margin of the optimized structure is ~15.9 and ~2.4 times larger than that of the Si and Si0.7Ge0.3-body 1T DRAM cells, respectively, with a retention time longer than 99 ms.