Proceedings of the Sixth Great Lakes Symposium on VLSI
DOI: 10.1109/glsv.1996.497611
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Simultaneous routing and buffer insertion for high performance interconnect

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Cited by 54 publications
(32 citation statements)
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“…Also more results are listed in table (11) for an interconnect wire of length 20000µm. As can be seen distances between buffers have become equal to each other, in which the errors are lower than 0.28%.…”
Section: Experimental Results Of Delay Minimization Using Pso Algorithmmentioning
confidence: 99%
See 1 more Smart Citation
“…Also more results are listed in table (11) for an interconnect wire of length 20000µm. As can be seen distances between buffers have become equal to each other, in which the errors are lower than 0.28%.…”
Section: Experimental Results Of Delay Minimization Using Pso Algorithmmentioning
confidence: 99%
“…In these studies, the delay minimization problem of on-chip interconnect wire is considered by simultaneous buffer insertion/sizing, and wire sizing. In fact, by manipulating the wire width, for example, the trade-off between capacitance and resistance can be balanced, and consequently the delay can be minimized [11]. On the other hand, correct buffer insertion area able to minimize signal delay by repowering the signal using amplifiers or buffers [12].…”
Section: Introductionmentioning
confidence: 99%
“…If one does not accept the restriction that the Steiner tree is fixed before buffer insertion is performed, then a suite of other heuristics emerge [8], [12]- [14], [16]. These heuristics all in some way exploit the dynamic programming paradigm, but in a manner that allows multiple tree topologies to be considered.…”
Section: Introductionmentioning
confidence: 99%
“…[1] developed a power-optimal buffer insertion algorithm to meet the delay specification. The buffered tree construction problem was studied without buffer stations (BS) or blockages in [2,3], and with BS blockage avoidance in [4,5,6,7]. Power was not considered explicitly in [2]- [7].…”
Section: Introductionmentioning
confidence: 99%