Single-chip processor for media applications: the MAP1000?

Basoglu, Chris; Gove, Robert John; Kojima, Keiji; O'Donnell, John

doi:10.1002/(sici)1098-1098(1999)10:1<96::aid-ima11>3.0.co;2-5

Cited by 12 publications

(4 citation statements)

References 8 publications

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“…The block diagram of the Hitachi/Equator Technologies MAP1000 [Basoglu et al 1999] is shown in Figure 10 The MAP1000 has a unique architecture in that it supports both data cache and DMA mechanism. With the DMA approach, the 16-kbyte data cache itself can be used as on-chip memory.…”

Section: E Hitachi/equator Technologies Map1000mentioning

confidence: 58%

VLIW Processor Architectures and Algorithm Mappings for DSP Applications

Managuli¹,

Kim²

2001

Signal Processing and Communications

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Section: E Hitachi/equator Technologies Map1000mentioning

confidence: 58%

VLIW Processor Architectures and Algorithm Mappings for DSP Applications

Managuli¹,

Kim²

2001

Signal Processing and Communications

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“…Therefore, our correction algorithm of 3 : 2 pulldowns takes a total of MOPS of sustained performance. This is well within current programmable mediaprocessors' computing power, such as the Philips Trimedia with peak performance of 4 BOPS [15], the Texas Instruments C80 and C62x series with peak performance of 2.4 BOPS [16] and 2 BOPS [17], respectively, and the Equator Technologies/Hitachi MAP with peak performance of 20 BOPS [18].…”

Section: Computation Requirementsmentioning

confidence: 99%

Using motion-compensated frame-rate conversion for the correction of 3:2 pulldown artifacts in video sequences

Hilman

Park

Kim

2000

IEEE Trans. Circuits Syst. Video Technol.

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Abstract-Currently, the most popular method of converting 24 frames per second (fps) film to 60 fields/s video is to repeat each odd-numbered frame for 3 fields and each even-numbered frame for 2 fields. This method is known as 3 : 2 pulldown and is an easy and inexpensive way to perform 24 fps to 60 fields/s frame-rate conversion. However, the 3 : 2 pulldown introduces artifacts, which are especially visible when viewing on progressive displays and during slow-motion playback. We have developed a motion-compensated frame-rate conversion algorithm to reduce the 3 : 2 pulldown artifacts. By using frame-rate conversion with interpolation instead of field repetition, mean square error and blocking artifacts are reduced significantly. The techniques developed here can also be applied to the general frame-rate conversion problem.Index Terms-Film-to-video conversion, frame-rate conversion, motion compensation, spatiotemporal interpolation, video processing, 3:2 pulldown.

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“…Typical examples are the MAP and MAP-CA processors by Equator [14,15]. These processors use a VLIW (Very Long Instruction Word) architecture with a large instruction set and special functional units tuned to perform common image processing kernels in hardware.…”

Section: Introductionmentioning

confidence: 99%