Single-chip surface-micromachined integrated gyroscope with 50°/hour root allan variance

A Novel Capacitive Detection Scheme With Inherent Self-Calibration

“…A real-time measurement algorithm based on (12) and (13) was developed and simulated using Simulink software. Fig.…”

“…In some cases, the effect of parasitics is negligible, and capacitive detection is done with a purely dc-biased sense capacitor [12]. In addition, pure dc detection is often used for frequency-response characterization of vibratory devices; in this case, responses of the device under test are collected for different frequencies of the ac driving voltage, and contribution of the parasitics is eliminated using postprocessing [8].…”

A 10 μm thick poly-SiGe gyroscope processed above 0.35 μm CMOS

“…Contacts to the top metal level are etched through the sacrificial layer, the etchstop layer and the CMOS passivation. The poly-SiGe structural layer, which is at least 10 µm thick for increased sensitivity, is deposited by using an advanced multilayer technology resulting in high quality films at low temperature (≤450ºC) [4]. The release is done using wet chemical processing and CO2 super-critical drying to eliminate stiction.…”

“…Crosstalk can be reduced by proper geometry and the application of balanced driving voltages. The signal is amplified using onchip front-end charge amplifiers, which use continuous-time reset with the feedback resistor implemented by means of a low transconductance MOSFET, driven in its sub-threshold region, using a modification of a technique developed by Geen [4]. Measured noise at 20 kHz in the final prototype circuit for one single-ended amplifier is 400 nV/sqrt(Hz), giving more than 109 dB of signal to noise-floor ratio for the expected sensitivity of the capacitive detection.…”

Tiny (0.72 mm²) pressure sensor integrating MEMS and CMOS LSI with back-end-of-line MEMS platform

“…Integrating MEMS with high-performance digital circuits and analog circuits achieves higher S/N ratio and smaller chip size [1][2][3]. Most of these integrations require special materials and process for stress-relaxation, such as a high-temperature-annealed thick poly-silicon structure and various post-CMOS MEMS processes, which limit the functions of integrated LSIs and the flexibility in manufacturing facilities or pose design constraints.…”