Single event upset on static random access memory devices due to spallation, reactor, and monoenergetic neutrons*

Abstract

This paper presents new neutron-induced single event upset (SEU) data on the SRAM devices with the technology nodes from 40 nm to 500 nm due to spallation, reactor, and monoenergetic neutrons. The SEU effect is investigated as a function of incident neutron energy spectrum, technology node, byte pattern and neutron fluence rate. The experimental data show that the SEU effect mainly depends on the incident neutron spectrum and the technology node, and the SEU sensitivity induced by low-energy neutrons significantly increases with the technology downscaling. Monte–Carlo simulations of nuclear interactions with device architecture are utilized for comparing with the experimental results. This simulation approach allows us to investigate the key parameters of the SEU sensitivity, which are determined by the technology node and supply voltage. The simulation shows that the high-energy neutrons have more nuclear reaction channels to generate more secondary particles which lead to the significant enhancement of the SEU cross-sections, and thus revealing the physical mechanism for SEU sensitivity to the incident neutron spectrum.

Single event effects evaluation on convolution neural network in Xilinx 28 nm system on chip

“…[9] Soft errors induced by alpha particles pose a critical threat to the reliability and operational lifespan of modern electronic systems. [10,11] Therefore, it is crucial to study SEE induced by alpha particle on CNN systems in order to develop its space applications. In this work, irradiation test and fault injection experiment are performed.…”

Neutron Irradiation Testing and Monte Carlo Simulation of a Xilinx Zynq-7000 System on Chip

“…The other method involves performing irradiation tests using various irradiation equipment to evaluate the effects of years of exposure in real surroundings in just a few hours with intense flux [7]. This can be achieved by using sources such as a reactor, monoenergetic neutrons, and spallation neutrons [14]. Among these, spallation neutrons are considered to be closer to the real situation and are the ideal surrogate for accelerating atmospheric neutron SEE tests when compared to the former two [15].…”

Investigation of single event effect in 28-nm system-on-chip with multi patterns*

“…Hence, it is extremely necessary to take SEE into account and evaluate this risk comprehensively. [9][10][11][12] SoC integrates multiple high-performance processing units in one single chip. The advantages of weight, performance, and power consumption assist it to be listed in the space application candidates.…”