Sj/Resurf Ldmost

Nassif-Khalil, S.G.; Hou, L.Z.; Salama, C.A.T.

doi:10.1109/ted.2004.829876

Cited by 115 publications

(56 citation statements)

References 11 publications

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“…The simulated proposed devices with the 48 lm drift length at V gs = 12 V has a R on,sp of 46.5 mX cm 2 . Compared with the specific on-resistance of SJ/R devices, it is 48.8 mX cm 2 at the same bias conditions [5]. These two designs are almost identical.…”

Section: Resultsmentioning

confidence: 91%

“…The vertical electric field component gives rise to a surplus of p type charge in the p pillars and upsets the delicate charge balance between the n and p pillars in the off-state [5]. In the proposed SJ-LDMOS (called proposed device) as illustrated in Fig.…”

Section: Device Structure and Operation Conceptmentioning

confidence: 99%

“…Lateral double-diffused MOSFETs (LDMOST) based on the super junction (SJ) concept were recently proposed to further improve the trade-off characteristics between the breakdown voltage (BV) and the on-resistance (R on ) which has always been a major issue in the design of power device [1][2][3][4][5][6]. The SJ concept is based on achieving charge compensation in the off-state, in a set of alternating and heavily doped n and p pillars comprising the drift region of the device.…”

Section: Introductionmentioning

confidence: 99%

“…Furthermore, in case of SJ concept on bulk silicon, a SJ-LDMOS with N-buffer layer was developed [4], while this method cannot realize the high breakdown voltage (>600 V). Although, SJ/RESURF LDMOS structure realized the high breakdown voltage [5], it is difficult to form the different doping concentrations for SJ region and RESURF region at one time which significantly increases the cost.…”

Section: Introductionmentioning

confidence: 99%

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Realizing high voltage SJ-LDMOS with non-uniform N-buried layer

Chen

Zhang

2008

Solid-State Electronics

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Section: Resultsmentioning

confidence: 91%

Section: Device Structure and Operation Conceptmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Realizing high voltage SJ-LDMOS with non-uniform N-buried layer

Chen

Zhang

2008

Solid-State Electronics

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“…To reduce the effect of substrate depletion on breakdown voltage, SJ-LDMOS on a silicon on sapphire substrate and a combination of superjunction and RESURF LDMOS are proposed [60,61]. Another approach is to design shallow pillars and place an "N-buffer layer" between the pillars and the substrate in Fig.…”

Section: The Superjunction Conceptmentioning

confidence: 99%

High-Voltage and Power Transistors

El-Kareh¹,

Hutter²

2015

Silicon Analog Components

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This chapter focuses mainly on the drain-extended MOS transistor, DEMOS, for high voltage applications, and on the lateral double-diffused MOS transistor, LDMOS, for high power applications. In both cases, the drain is extended with a lightly-doped region, referred to as the drift region, to sustain the high voltage. The chapter begins with an analysis of the drift region and its optimization, typically by reduced surface-field (RESURF) techniques. The transistor switching performance is then analyzed, followed by a discussion of DEMOS and LDMOS design considerations and characteristics. High-voltage and high-current effects are then described, including quasi-saturation, body current, on-state breakdown, and safe operating area (SOA). The chapter concludes with selected high-voltage device applications. IntroductionThe MOSFETs discussed in Chap. 6 are designed for digital, analog, mixed-signal, and RF applications that operate in the low-to-medium voltage range of about 0.8-6 V. Many analog applications, however, require transistors that can handle voltages above 20 V and currents in the ampere range. Those transistors are referred to as high-voltage and power transistors. This chapter provides a comprehensive analysis of the drain-extended MOS transistor (DEMOS), for high-voltage and low-current applications, and the lateral double-diffused MOS (LDMOS) transistor, LDMOS, for power applications. (The "D" in LDMOS describes the sequential (double) diffusion of boron and arsenic through the same oxide opening, defining a precise channel length (Chap. 9). The "L" means that the current path is parallel to the silicon surface (lateral), as opposed to "V" in VDMOS where the current is nearly vertical to the silicon surface.) Schematic cross sections of both transistors (Table 7.1). The DEMOS is typically processed without added process complexity, whereas the LDMOS requires optimization of the P-body and N-drift regions to achieve high voltages and currents while minimizing the drain-to-source resistance and transistor area.The interest in bipolar, CMOS, and DMOS (BCD) technologies has been driven primarily by the proliferation of portable electronics, automotive electronics, and the need for energy efficiency. These applications cluster around different operating points, with 24 V for portable electronics; 60 V for automotive, solar, and LED backlighting; 85 V for power over Ethernet; 120 V for telecommunication; and 700 V for offline LED lighting, consumer, and industrial applications. As a result, BCD is now the technology of choice to realize power ICs by most integrated device manufacturers (IDM) and foundries [1][2][3][4][5].This chapter focuses mainly on transistors with voltage capabilities in the range of 20-700 V, where the bulk of the product applications lie.

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Superjunction

Napoli

2014

Wiley Encyclopedia of Electrical and Electronics Engineering

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Power semiconductor devices control the energy flow in virtually every electric and electronic system. Most commonly recognized applications are: automotive, traction, consumer electronics, air conditioning, electric engines. The improvement in power devices results in improved power management circuits with increased efficiency. Reduced environmental pollution, reduced cost, reduced size, and longer battery life are only few of the advantages that derive from advancements in the design of power semiconductor devices. Dating from the invention of the tranistor, a continuous research and development activity, driven by the huge market request, provided new device concepts, advanced design techniques, and new materials that largely improved the performance of the power semiconductor devices. A big step towards the ideal device is the introduction of the SuperJunction (SJ) concept in 1997 with inherent drastic reduction of the ON state resistance and of the conduction losses for power devices. SJ is not an improvement due to the use of a new material. It is an improvement derived by an innovative design concept for the sustaining layer that, instead of exhibiting a one dimensional structure, is manufactured with a complex two or three dimensional structure. SJ design technique is therefore applicable to different power devices but requires a design approach that differs from the one used for conventional power devices.

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Sj/Resurf Ldmost

Cited by 115 publications

References 11 publications

Realizing high voltage SJ-LDMOS with non-uniform N-buried layer

Realizing high voltage SJ-LDMOS with non-uniform N-buried layer

High-Voltage and Power Transistors

Superjunction

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