Small-Signal Approach for Precise Evaluation of Gate Losses in Soft-Switched Wide-Band-Gap Transistors

Abstract

High-frequency switching is favorable for fast transient response, small size of passive components and superior power density, especially in soft-switching topologies. At high frequencies, power dissipation due to consecutive charging/discharging of gate capacitance is considerably large. As presented in this work, the actual gate charge (QG) of a transistor can be very different from the typical values reported in manufacturer datasheet, which leads to errors in estimation and modeling of gate loss based on datasheets. Furthermore, the reported QG values in datasheets correspond to a hard-switching test condition, and are not a good representative of the losses in soft-switched transistors. Here, we propose a simple method to precisely evaluate gate loss in soft-switched transistors for highfrequency applications. A small-signal input-capacitance measurement is used to derive gate loss in two commercial Gallium-Nitride (GaN) transistors. The estimated losses are then verified by results from accurate thermal modeling based on a matrix of temperatures, when the transistors are driven up to 30 MHz. The results are of great significance to the modeling and accurate measurement of gate losses at high frequencies. It is instrumental to a proper cooling design to avoid device and gate driver thermal runaway and failure. Also, the more accurate gate capacitance measurement enables an accurate dead time adjustment to achieve synchronized turn ON between various transistors in soft-switching topologies.

Active-Device Losses in Resonant Power Converters: A Case Study with Class-E Inverters

“…Moreover, the losses in gate driving become non-negligible in MHz-range switching frequencies. In this regard, the conventional approach used to calculate gate-driving losses accounts only for the gate loss, 𝑃 G , which is related to the turn-ON and turn-OFF processes of the power transistor [14], [15], with some works separating 𝑃 G into driver and transistor losses based on the physical location of gate-loop path resistances [16]. But this approach leaves the switching loss inside the gate driver itself unaccounted for [17].…”

Transistorization of Industrial Dielectric Heating Plants

“…2.7(a) shows the C ISS plot as reported in the device datasheet. As seen that the gate capacitance is fixed at approximately 200 pF as the V DS varies from 0-600 V. However, to measure the C ISS under soft-switching condition we take the approach presented in [38]. In this method impedance analyzer is used.…”