2009 IEEE International Symposium on Parallel &Amp; Distributed Processing 2009
DOI: 10.1109/ipdps.2009.5161214
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Smith-Waterman implementation on a FSB-FPGA module using the Intel Accelerator Abstraction Layer

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Cited by 20 publications
(10 citation statements)
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“…This allows for a seamless integration of the FPGA accelerator for the alignment kernel with the PaPaRa algorithm running on a standard Linux PC. Related FPGA implementations of the Smith Waterman algorithm used FPGA boards that were connected to the PC via the PCI bus [22] or directly via the CPU bus [23].…”
Section: Related Workmentioning
confidence: 99%
“…This allows for a seamless integration of the FPGA accelerator for the alignment kernel with the PaPaRa algorithm running on a standard Linux PC. Related FPGA implementations of the Smith Waterman algorithm used FPGA boards that were connected to the PC via the PCI bus [22] or directly via the CPU bus [23].…”
Section: Related Workmentioning
confidence: 99%
“…Our target execution platform consists of a high-end FPGA accelerator from XtremeData (XD2000i-FSBFPGA) that has already been successfully used for implementing bioinformatics algorithms [33]. This platform contains two Stratix-III 260 FPGAs, high bandwidth local memory (8.5 Gbytes/s) and a tight coupling to the host front side bus though Intel Quick Assist technology, providing sustained 2 Gbytes/s bandwidth between the FPGA and the host main system memory.…”
Section: Resultsmentioning
confidence: 99%
“…Our target execution platform consists in a high-end FPGA accelerator from XtremeData (XD2000i-FSBFPGA) which has already been successfully used for implementing bioinformatics algorithms [2]. This platform contains two Stratix-III 260 FPGAs, high bandwidth local memory (8.5 GBytes/s) and a tight coupling to the host front side bus though Intel Quick Assist technology, providing sustained 2 GBytes/s bandwidth between the FPGA and the host main system memory.…”
Section: Rr N°7370 6 Experimental Resultsmentioning
confidence: 99%