SoCDep<sup>2</sup>: A framework for dependable task deployment on many-core systems under mixed-criticality constraints

Azad, Siavoosh Payandeh; Niazmand, Behrad; Ellervee, Peeter; Raik, Jaan; Jervan, Gert; Hollstein, Thomas

doi:10.1109/recosoc.2016.7533903

Cited by 6 publications

(4 citation statements)

References 8 publications

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“…This part of the analysis is performed by the use of Routing Graphs [3]. A Routing Graph, RG(V, E), is a directed acyclic graph where V is the set of vertices that represent all network ports (input and output ports of the routers including the local ports) and E is the set of all edges which represent connections between the input and output ports.…”

Section: Analysis Of Attack Suspectsmentioning

confidence: 99%

“…In this analysis the following routing algorithms have been considered: XY [24], YX [25], West-First [26], East-First [27], North-First [28], North-Last [26], Negative First [26], and South-First [28]. In this work, the SocDep 2 [3] framework has been used for modeling the routing graphs for the above mentioned turn models and for evaluating the presented Algorithms 1 and 2 for different scenarios. Compared to oblivious search (marked in orange in Figures 7-9), the use of router locations will reduce the search space in the worst case effort by 52%, 42%, and 21% for the previously illustrated sensitive paths 1, 2, and 3.…”

Section: Analysis Of Attack Suspectsmentioning

confidence: 99%

“…NoC-based SoCs allow a very flexible task deployment onto the MPSoC's computational nodes. This flexibility also enables enhanced dependability concepts [3,4], providing fault-tolerance and, with this, a high-level of reliability in case of wear-out of some of the chip's nano-scaled structures. In order to detect deviations in the system health state, critical resources (as routers) have to be equipped with local health monitoring technology (hardware fault checkers).…”

Section: Introductionmentioning

confidence: 99%

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DoS Attack Detection and Path Collision Localization in NoC-Based MPSoC Architectures

Chaves

Azad

Hollstein

et al. 2019

JLPEA

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Denial of Service (DoS) attacks are an increasing threat for Multiprocessor System-on-Chip (MPSoC) architectures. By exploiting the shared resources on the chip, an attacker is able to prevent completion or degrade the performance of a task. This is extremely dangerous for MPSoCs used in critical applications. The Network-on-Chip (NoC), as a central MPSoC infrastructure, is exposed to this attack. In order to maintain communication availability, NoCs should be enhanced with an effective and precise attack detection mechanism that allows the triggering of effective attack mitigation mechanisms. Previous research works demonstrate DoS attacks on NoCs and propose detection methods being implemented in NoC routers. These countermeasures typically led to a significantly increased router complexity and to a high degradation of the MPSoC’s performance. To this end, we present two contributions. First, we provide an analysis of information that helps to narrow down the location of the attacker in the MPSoC, achieving up to a 69% search space reduction for locating the attacker. Second, we propose a low cost mechanism for detecting the location and direction of the interference, by enhancing the communication packet structure and placing communication degradation monitors in the NoC routers. Our experiments show that our NoC router architecture detects single-source DoS attacks and determines, with high precision, the location and direction of the collision, while incurring a low area and power overhead.

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Section: Analysis Of Attack Suspectsmentioning

confidence: 99%

Section: Analysis Of Attack Suspectsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

DoS Attack Detection and Path Collision Localization in NoC-Based MPSoC Architectures

Chaves

Azad

Hollstein

et al. 2019

JLPEA

Self Cite

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“…The mix of different criticalities originates from different requirements in safety [Int11;Rad11;Int10] for different applications running in the same system. Very often, a mixed-criticality application environment requires temporal and spatial isolation to guarantee freedom from interference [Hol+15;Aza+16]. Such isolation has traditionally been achieved by a federated architecture [DS10].…”

Section: Introduction and Related Workmentioning

confidence: 99%

Synthesis of Safety-Critical Real-Time Systems

Zhou

2022

Linköping Studies in Science and Technology. Dissertations

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Bil-, flygelektronik-, järnvägs-och medicinska system är exempel på typiska säkerhetskritiska system. På grund av ökade krav på datakommunikation i sådana system är Ethernet med protokoll för tidskänsliga nätverk (TSN) vanligt förekommande. Flera designutmaningar såsom tids-och säkerhetskrav måste hanteras när TSN tillämpas i säkerhetskritiska system. Tidskrav hanteras ofta genom tidsutlöst schemaläggning. Säkerhetskraven inkluderar både slumpmässiga och systematiska fel. Kraven hanteras i TSN genom syntetiserade tidsutlösta scheman och rutter för meddelanden med redundans som lösning för slumpmässiga och systematiska fel. Denna avhandling inkluderar metoder för effektiv syntes av förebyggande tidsutlösta scheman och rutter för meddelanden i TSN. På grund av att funktioner blir alltmer komplexa och integrerade så behöver dessa ofta integreras på samma datorplattform. Denna avhandling föreslår så kallad serverbaserad uppgiftsschemaläggning för system med olika nivåer på säkerhetskrav. Detta innebär att funktioner garanteras vara fria från störningar samt att resursanvändning minimeras.

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From online fault detection to fault management in Network-on-Chips: A ground-up approach

Azad

Niazmand

Janson

et al. 2017

2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits &Amp; Systems (DDECS)

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SoCDep²: A framework for dependable task deployment on many-core systems under mixed-criticality constraints

Cited by 6 publications

References 8 publications

DoS Attack Detection and Path Collision Localization in NoC-Based MPSoC Architectures

DoS Attack Detection and Path Collision Localization in NoC-Based MPSoC Architectures

Synthesis of Safety-Critical Real-Time Systems

From online fault detection to fault management in Network-on-Chips: A ground-up approach

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SoCDep2: A framework for dependable task deployment on many-core systems under mixed-criticality constraints

Cited by 6 publications

References 8 publications

DoS Attack Detection and Path Collision Localization in NoC-Based MPSoC Architectures

DoS Attack Detection and Path Collision Localization in NoC-Based MPSoC Architectures

Synthesis of Safety-Critical Real-Time Systems

From online fault detection to fault management in Network-on-Chips: A ground-up approach

Contact Info

Product

Resources

About

SoCDep²: A framework for dependable task deployment on many-core systems under mixed-criticality constraints