Soft Information for LDPC Decoding in Flash: Mutual-Information Optimized Quantization

Abstract

Abstract-High-capacity NAND flash memory can achieve high density storage by using multi-level cells (MLC) to store more than one bit per cell. Although this larger storage capacity is certainly beneficial, the increased density also increases the raw bit error rate (BER), making powerful error correction coding necessary. Traditional flash memories employ simple algebraic codes, such as BCH codes, that can correct a fixed, specified number of errors. This paper investigates the application of lowdensity parity-check (LDPC) codes which are well known for their ability to approach capacity in the AWGN channel. We obtain soft information for the LDPC decoder by performing multiple cell reads with distinct word-line voltages. The values of the word-line voltages (also called reference voltages) are optimized by maximizing the mutual information between the input and output of the multiple-read channel. Our results show that using this soft information in the LDPC decoder provides a significant benefit and enables the LDPC code to outperform a BCH code with comparable rate and block length over a range of block error rates.

Read Reference Voltage Adaptation for NAND Flash Memories With Neural Networks Based on Sparse Histograms

“…Figure 2 shows two exemplary readout methods. SD readout with low resolution for LDPC codes are considered in [35]. Good performance is achieved with two additional readouts per reference, which results in one additional soft bit (SB).…”

“…In the following the soft readout types are called 1 SB and 2 SB method, respectively. Notice that in perfect conditions, the additional RRVs are chosen such that the mutual information is maximized [35].…”

Error correction improvement based on weak-bit-flipping for resistive memories

“…Another way of identifying weak bits in resistive (flash) memories is to compare the electrical resistance (threshold voltage) of a storage device against different reference values [3][8] [11][17] [19]. Any bit that changes its value when sensed with the additional reference values may be considered as weak.…”

“…A way to identify weak bits in resistive and flash memories is to perform multiple sense operations with different reference values [8] [11][17] [19]. The resulting information can be considered as a rudimentary type of the soft-information [1][4] [10] usually used to boost the error correction capability of powerful ECCs such as low-density parity-check (LDPC) codes [16] [17] [19]. LDPC codes necessitate slow iterative decoding which makes them suitable for relatively slow storage systems with page-level access.…”