Source/Drain Engineering for High Performance Vertical MOSFET

Self Cite

To understand oxidation in three-dimensional silicon, dynamic characteristics of a SiO x system with various stoichiometries were investigated. The calculated results show that the self-diffusion coefficient increases as oxygen density decreases, and the increase is large when the temperature is low. It also shows that the self-diffusion coefficient saturates, when the number of removed oxygen atoms is sufficiently large. Then, approximate analytical equations are derived from the calculated results, and the previously reported expression is confirmed in the extremely low-SiO-density range.

Section: Discussionmentioning

confidence: 99%

Oxygen concentration dependence of silicon oxide dynamical properties

Yajima¹,

Shiraishi²,

Endoh³

et al. 2018

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“…1). [1][2][3][4] Because this device structure can reduce the short-channel off-state leakage current, it is promising to suppress the wasting energy. Further, it occupies narrower area than conventional planar MOSFETs, and can be stacked as multistories to realize the higher density integration.…”

Section: Introductionmentioning

confidence: 99%

Reconsideration of Si pillar thermal oxidation mechanism

Kageshima¹,

Shiraishi²,

Endoh³

2018

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The mechanism of Si pillar thermal oxidation is considered. The Si emission is discussed in the oxidation of three-dimensional structures, which must be fundamentally important to understand the oxidation mechanism. It is confirmed that the Si emission is enhanced in the three-dimensional structures by the geometrical and stress effects. The larger effect is expected for Si spheres rather than for Si pillars. More enhanced Si emission can be expected for the smaller spheres. Then the mechanism of Si missing and the effect of Si emission are also discussed. The oxide viscous flow mechanism is the promising candidate to explain the Si missing, because the oxide viscosity could be reduced by the SiO incorporation and the compressive stress. The geometrical effect induces the viscosity gradient, which is important to induce the Si missing. Interplay of the emitted SiO and the accumulated stress is the key in Si pillar oxidation. Careful approaches are suggested for the oxidation of three-dimensional structures.

“…Moreover, it has various merits such as the reduction in transistor area, its back-bias-effect-free-characteristic, its excellent drivability and off-leakage current, and suppression of the short-channel effect. [11][12][13][14][15][16][17] The bird's eye view and cross-sectional view of the vertical BC-MOSFET are shown in Fig. 2.…”

Section: Introductionmentioning

confidence: 99%

Sub-1-V–60 nm vertical body channel MOSFET-based six-transistor static random access memory array with wide noise margin and excellent power delay product and its optimization with the cell ratio on static random access memory cell

Ogasawara

Endoh

2018

Self Cite

In this study, with the aim to achieve a wide noise margin and an excellent power delay product (PDP), a vertical body channel (BC)-MOSFETbased six-transistor (6T) static random access memory (SRAM) array is evaluated by changing the number of pillars in each part of a SRAM cell, that is, by changing the cell ratio in the SRAM cell. This 60 nm vertical BC-MOSFET-based 6T SRAM array realizes 0.84 V operation under the best PDP and up to 31% improvement of PDP compared with the 6T SRAM array based on a 90 nm planar MOSFET whose gate length and channel width are the same as those of the 60 nm vertical BC-MOSFET. Additionally, the vertical BC-MOSFET-based 6T SRAM array achieves an 8.8% wider read static noise margin (RSNM), a 16% wider write margin (WM), and an 89% smaller leakage. Moreover, it is shown that changing the cell ratio brings larger improvements of RSNM, WM, and write time in the vertical BC-MOSFET-based 6T SRAM array.