Source Extended GaSb/GaAs Heterojunction GAATFET to Improve I<sub>ON</sub>/I<sub>OFF</sub> Ratio

Karthik, Kadava R. N.; Pandey, Chandan; Singh, Avtar; Nanda, Umakanta

doi:10.1109/edkcon56221.2022.10032826

Cited by 3 publications

(1 citation statement)

References 26 publications

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“…Few researchers have already found some solutions to overcome the ambipolarity in TFETs, which include placing a dielectric pocket at drain/channel interface, 12 elevated source TFET, 13 using electrostatic doping, etc 14 . Moreover, a few techniques like gate‐all‐around TFET, 15 source with low bandgap material, 16 hetero dielectric, 17 strain engineering, 18 heterojunction 19 etc. have been suggested in the literature by a few research groups to amplify the on‐state conduction in TFETs.…”

Section: Introductionmentioning

confidence: 99%

GaSb/GaAs Type‐II heterojunction GAA‐TFET with core source for enhanced analog/RF performance and reliability

Karthik,

Pandey

2023

Int J Numerical Modelling

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For the first time, a novel source extension heterojunction gate‐all‐around tunnel FET (SE‐GAA‐TFET) is proposed and examined using Synopsys TCAD simulator in this manuscript. SE‐GAA‐TFET is found to exhibit improved performance in terms of various analog/RF and DC parameters. As channel/source (C/S) interface and electric field exerted by gate are perpendicular to each other, radius of channel is downscaled to enhance electric filed, without reducing area of the tunneling. Furthermore, the presence of GaSb/GaAs heterojunction at C/S interface leads to reduction in the effective band overlap, which helps a great number of mobile charges to tunnel through C/S boundary at ON‐state. The consequences of variation in different geometrical metrics are evaluated to optimize the device performance. SE‐GAA‐TFET is found to offer a current switching ratio (CSR) of ~1013 along with 32.2 mV dec−1 of average sub‐threshold swing (SSAVG). Furthermore, improvement in transconductance and parasitic capacitance boost the cut‐off frequency of SE‐GAA‐TFET up to 37 GHz. Next, both positive and negative traps are introduced at S/C interface and the study reveals that there is no much deviation in parameters of the transfer characteristics like ION, SSAVG, and IOFF of SE‐GAA‐TFET. Next, proper benchmarking is done to compare the performance of the SE‐GAA‐TFET with similar devices available in literature and it is found that proposed SE‐GAA‐TFET exhibits better DC performance due to improved electrostatic behavior. Finally, SE‐GAA‐TFET is found to offer better fall time along with full‐voltage swing when deployed in a resistive load inverter.

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