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A novel structure of GAA vertical TFET (GAA-VTFET) is proposed and investigated with the help of 3D TCAD simulator. It is found that GAA-VTFET offers much improvement in various DC parameters like ION, IOFF, SSAVG, and turn-on voltage (VT) compared to a conventional GAA-TFET. As the tunneling direction of charge carriers is in parallel to the gate electric field, channel thickness in GAA-VTFET is rigorously reduced and thus improves the tunneling rate at the source/channel interface during ON-state. Further, IOFF is significantly reduced due to deployment of a dielectric layer beneath the channel/drain interface. The impact of variation in geometric dimensions is also analyzed to obtain optimum performance of the GAA-VTFET. ION/IOFF is observed to be in order of ∼1013 while SSAVG of 56 mV/decade is achieved. Analog/RF parameters are also analyzed and it is noticed that an improved cut-off frequency of 593 GHz is achieved due to improvement in parasitic capacitances and transconductance. Next, benchmarking reveals that GAA-VTFET offers better ION/IOFF, VT, and SSAVG as compared with the similar devices. Finally, based on transient analysis of inverter circuit, GAA-VTFET is found to be more suitable for digital applications as it offers less rise-time along with full-voltage swing.

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