2014
DOI: 10.7567/jjap.53.034201
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Source-side injection single-polysilicon split-gate flash memory

Abstract: The source-side injection single-polysilicon split-gate NOR (S4-NOR) flash memory is proposed for embedded applications. For the S4-NOR cell, the access and floating gates are patterned on the channel between the source and drain junctions with a gap length of 55 nm using conventional photolithography technology, and the floating gate is capacitively coupled to an n-well memory gate. This technology can improve the compatibility with a single-polysilicon CMOS logic process. The memory cell is programmed within… Show more

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Cited by 2 publications
(2 citation statements)
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“…In the SSI mechanism both the hor nents are involved. In previous technol were described, respectively, as [25]: In the SSI mechanism both the horizontal (E H ) and vertical (E V ) electric field components are involved. In previous technology nodes, E H and E V during program operation were described, respectively, as [25]:…”
Section: Electrode Programmentioning
confidence: 99%
“…In the SSI mechanism both the hor nents are involved. In previous technol were described, respectively, as [25]: In the SSI mechanism both the horizontal (E H ) and vertical (E V ) electric field components are involved. In previous technology nodes, E H and E V during program operation were described, respectively, as [25]:…”
Section: Electrode Programmentioning
confidence: 99%
“…This is primarily because of the increase in the cell size. [6,14] In contrast to NOR, NAND flash builds cells in series with adjacent cells that share the source and drain. This specific structure waives the requirement for an extra metal line and thus significantly reduces the cell size, enabling the NAND memory to have a much smaller cell size and lower die cost than the NOR memory.…”
Section: Flash Memorymentioning
confidence: 99%