2016
DOI: 10.1109/tpel.2016.2521330
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Space-Vector PWM With Common-Mode Voltage Elimination for Multiphase Drives

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Cited by 57 publications
(22 citation statements)
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“…From (8) to (10), we know that this is a convex quadratic programming (CQP) with equality constraints and inequality constraints. The CQP problem contains two parameters, the magnitude V* and position θ of the reference vector, where, 0.57735Ud ≤ V* ≤ 0.622Ud, 0° ≤ θ ≤ 30°.…”
Section: Six-phase Svpwm Based On Optimization Modelmentioning
confidence: 99%
See 1 more Smart Citation
“…From (8) to (10), we know that this is a convex quadratic programming (CQP) with equality constraints and inequality constraints. The CQP problem contains two parameters, the magnitude V* and position θ of the reference vector, where, 0.57735Ud ≤ V* ≤ 0.622Ud, 0° ≤ θ ≤ 30°.…”
Section: Six-phase Svpwm Based On Optimization Modelmentioning
confidence: 99%
“…It can be evidently investigated that, the space vector pulse width modulation (SVPWM) is the most widely applied scheme. SVPWM has attractive flexibility for optimizing switching waveforms and is convenient to implement on embedded processors [10,11], as well as its operational advantages over carrier-based techniques (i.e., low total harmonic distortion, high efficiency and voltage available in the DC-link) [12].…”
Section: Introductionmentioning
confidence: 99%
“…Several topologies for multilevel inverters have been proposed in the past decades, including diode-clamped [9], flying capacitor [1], cascaded H-bridge [10] and modular multilevel [11]. For a given multilevel converter topology, modulation scheme is a key factor [12][13][14][15][16][17]. Among various modulation schemes, space vector pulse width modulation (SVPWM) scheme is an attractive candidate due to its flexibility to optimize switching waveforms and its convenience to be implemented in digital signal processors [1,[12][13][14].…”
Section: Introductionmentioning
confidence: 99%
“…The high frequency, high amplitude and large step size (dv/dt) of CMV produces bearing currents via parasitic capacitances which may lead to insulation and bearing failures [10], mechanical vibration [11] and also bearing undesirable electromagnetic interference (EMI) [12]. Several PWM techniques based on sinusoidal PWM [13][14][15] or SVPWM [16][17][18][19][20] strategies have been applied to reduce the CMV in multiphase systems. The researchers tried to reduce the CMV by phase shifting of carrier signal in control system of five-phase and six-phase (both symmetrical and asymmetrical) two-level voltage source inverters feeding R-L load, which leads to higher phase current harmonic and distortion [13].…”
mentioning
confidence: 99%
“…Chen and Hsieh [16] proposed a pulse-width modulator with minimum CMV for generalized two-level N-phase voltage source inverters with odd phase numbers, and used vectors with minimum CMV. A multidimensional strategy was proposed in literature [17] to eliminate the CMV in generalized multiphase multilevel inverter by selecting switch states with zero CMV. But this method is suitable only for multilevel inverters with a level number higher than three.…”
mentioning
confidence: 99%