Special reliability features for Hf-based high-/spl kappa/ gate dielectrics

Ma, T.P.; Bu, H.; Wang, X.W.; Song, Liyang; He, Wei; Wang, Miaomiao; Tseng, Hsing‐Huang; Tobin, P.J.

doi:10.1109/tdmr.2005.845329

Cited by 54 publications

(21 citation statements)

References 6 publications

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“…Because the P-F conduction depends on electron hopping via defects in high-k dielectrics under low applied field, either trap assist tunneling (TAT) or P-F conduction was reported to be associated with the leakage current mechanism [7,8]. Specht et al investigated the transport mechanisms of 3.6-6 nm thick high-k layers and explained the transformation of leakage current from elastic TAT to P-F conduction in the range of low-middle electric field and the change of the P-F conduction to Fowler-Nordheim (F-N) tunneling under high electric field [9].…”

Section: Resultsmentioning

confidence: 99%

“…After deposition of the Hf-based gate dielectric on Si, in order to investigate the annealing effect on the electrical properties of the oxide layer, one group of the asgrown samples was subsequently annealed by a rapid thermal annealing process at 1000°C for 10 s in N 2 ambient. The interface layer between the dielectric and Si, which is around 1 nm thick, was formed by an ozone process before the Hf-based oxide ALD process [7]. The measured thickness of all as-grown Hf-based oxide layers was around 4 nm.…”

Section: Methodsmentioning

confidence: 99%

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Post annealing effect on ultra-thin Hf-based high-k gate oxides on Si

Kim

Ignatova

Kücher

et al. 2009

Current Applied Physics

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Section: Resultsmentioning

confidence: 99%

Section: Methodsmentioning

confidence: 99%

Post annealing effect on ultra-thin Hf-based high-k gate oxides on Si

Kim

Ignatova

Kücher

et al. 2009

Current Applied Physics

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“…Temperature dependent measurements on HfO2 have reported Frenkel-Poole conduction with various trap depths between 0.35eV and 1.5eV below the conduction band [7,8,11]. Temperature dependent charge trapping experiments have been performed and indicate a large presence of charge traps around 0.35eV which contribute to threshold instabilities [12].…”

Section: Introductionmentioning

confidence: 99%

Temperature (5.6-300K) Dependence Comparison of Carrier Transport Mechanisms in HfO<inf>2</inf>/SiO<inf>2</inf> and SiO<inf>2</inf> MOS Gate Stacks

Southwick

Reed

Buu

et al. 2008

2008 IEEE International Integrated Reliability Workshop Final Report

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Temperature dependent measurements have been used to examine transport mechanisms and energy band structure in MOS devices. In this study, a comparison between high-k HfO2 dielectrics and conventional SiO2 dielectrics is made to investigate dielectric specific thermally activated mechanisms. Temperature dependent measurements on large area n/pMOSFETs composed of SiO2 and HfO2/SiO2 gate dielectrics were performed from 5.6K to 300K. A large increase in the gate leakage current is observed at the formation of the minority carrier channel. The data indicate that gate leakage current prior to the formation of the minority channel is carrier rate limited while gate leakage current is tunneling rate limited above the threshold voltage. Gate leakage current measurements show two distinct Arrhenius transport regimes for both SiO2 and HfO2 gate dielectrics. The Arrhenius behavior of the gate leakage current is characterized by a strong temperature dependent regime and a weak temperature dependent regime. The activation energy of the strong temperature regime is found to vary with the applied gate voltage. Frenkel-Poole or other electric field models are able to explain the gate voltage dependence of the gate leakage current for the lowtemperature/voltage regime investigated. The data suggest that the variation of the activation energy for the Arrhenius behavior is weakly electric-field driven and strongly voltage, or Fermi energy level, driven. The weak electric field and strong voltage dependence of the thermal characteristics of the gate leakage current may point to trap densities within the HfO2 that vary in energy (hence applied voltage) as responsible for the observed activation energies. Trap assisted tunneling (or hopping) could be implicated as the transport mechanism.

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“…For example, we have evidence to show that it is charge trapping, rather than TDDB, which severely limits the actual device lifetime [1]. To elaborate on this, Fig.1 shows that the operating voltage (V OP ) for a 10-year lifetime for a set of polySi gated nMOSFETs was found to be 2.4V by TDDB measurement, but only 0.63V based on trapping-induced ∆V th [1,2].…”

Section: Introductionmentioning

confidence: 99%

Charge Trapping: A Major Reliability Challenge for High-k Gate Dielectrics

Wang

Song

et al. 2006

ECS Trans.

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This paper focuses on a major reliability issue for Hf-based high-k gate dielectrics. It will show that (1) the operating lifetime extracted from the trapping induced threshold voltage shift, ∆V th , is much shorter than that extracted from Time-Dependent Dielectric Breakdown, and therefore the actual device lifetime is limited by charge trapping; (2) Biased in inversion, electron trapping is the dominant mechanism for nMOSFETs; hole trapping is the dominant mechanism for pMOSFETs at low voltages (< 2 eV); (3) for pMOSFETs biased at high voltages (> 2.6 V), either net electron trapping or net hole trapping are observed, depending on the details of the stress conditions; (4) the above can be explained by the electron and hole currents through the dielectric for a given stress condition; (5) electron traps (with the energy level at ~0.68eV below E c of the dielectric) give rise to Frenkel-Poole (F-P) conduction; (6) hole traps do not participate in F-P conduction in the temperature range studied (300-500 k).

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Special reliability features for Hf-based high-/spl kappa/ gate dielectrics

Cited by 54 publications

References 6 publications

Post annealing effect on ultra-thin Hf-based high-k gate oxides on Si

Post annealing effect on ultra-thin Hf-based high-k gate oxides on Si

Temperature (5.6-300K) Dependence Comparison of Carrier Transport Mechanisms in HfO<inf>2</inf>/SiO<inf>2</inf> and SiO<inf>2</inf> MOS Gate Stacks

Charge Trapping: A Major Reliability Challenge for High-k Gate Dielectrics

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