Specification Enforcing Refinement for Convertibility Verification

Roop, Partha S.; Girault, Alain; Sinha, Roopak; Goessler, Gregor

doi:10.1109/acsd.2009.25

Cited by 5 publications

(4 citation statements)

References 18 publications

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“…A final step implements the supervisor SUP by transforming it into a set of control functions, one for each x c , according to the technique described in [10]. The DCS technique has been suggested to synthesis some temporal properties over toy robot [1], and to solve mismatches between interacting protocols [18].…”

Section: Discrete Controller Synthesismentioning

confidence: 99%

See 1 more Smart Citation

Safe design method of embedded control systems. Case study

Hajjar¹,

Dumitrescu²,

Niel³

2013

Journal Européen des Systèmes Automatisés

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This paper proposes an approach for safe design of hardware embedded control systems. The approach is based on a combination of formal verification and discrete controller synthesis techniques. Formal verification is solicited to detect design errors and provide counterexamples, while the Discrete Controller Synthesis technique is used to correct those error since it attempts to enforce previously verified specifications which do not hold. It automatically produces control code, which is assembled to the erroneous component in order to provide a system correct by construction with respect to the specification to enforce. We illustrate the approach on a train controller subsystem taken from "Bomabardier Transport" company. Mots-clés-COTS, Vrification formelle, synthse du contrleur discret, systme evenements discrets, proprit de sret, proprit de vivacit, composant correct par conception.

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Section: Discrete Controller Synthesismentioning

confidence: 99%

“…We demonstrate the validity of this approach on an railway control system. The discrete controller synthesis has been suggested to synthesize some temporal properties over toy robot [1], and to solve mismatches between interacting protocols [18]. An optimization over the DCS method has been proposed in [11].…”

Section: Introductionmentioning

confidence: 99%

Safe design method of embedded control systems. Case study

Hajjar¹,

Dumitrescu²,

Niel³

2013

Journal Européen des Systèmes Automatisés

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“…La SCD a été utilisée dans de nombreuses applications, notamment pour synthétiser certaines propriétés temporelles pour la conception d'un robot (Altisen et al, 2003), et pour résoudre les discordances entre les protocoles d'interaction (Roop et al, 2009). Nous intégrons cette technique dans la méthode de conception développée, afin de corriger automatiquement les erreurs de conception préalablement détectées par la technique du "model checking".…”

Section: La Synthèse De Contrôleurs Discrets (Scd)unclassified

Conception sûre de systèmes de contrôle-commande matériels à base de COTS

Hajjar¹,

Dumitrescu²,

Niel³

2013

Journal Européen des Systèmes Automatisés

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International audienceCet article propose une méthode de conception sûre de systèmes de contrôle-commande embarqués à base de COTS ControlBuild. La méthode commence par l'élaboration des COTS ControlBuild, puis elle utilise la vérification formelle pour découvrir les erreurs de conception. Ensuite la technique de la synthèse du contrôleur discret (SCD) est employée pour corriger automatiquement les erreurs détectées. La méthode proposée est illustrée sur un l'exemple d'un système ferroviaire d'accès voyageurs pour le train NAT. ABSTRACT. This paper proposes an approach for safe design of hardware embedded control systems. The approach is based on a combination of formal verification and discrete controller synthesis techniques. Formal verification is solicited to detect design errors and provide counterexamples, while the Discrete Controller Synthesis technique is used to correct those error since it attempts to enforce previously verified specifications which do not hold. It automatically produces control code, which is correct by construction with respect to the specification to enforce. We illustrate the approach on a real train controller subsystem

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“…A similar formalization is proposed by (De Alfaro and Henzinger, 2001) with the interface automata, capturing compositional aspects such as environment assumptions. Interface generation is also considered by (Roop et al, 2009), in order to solve mismatches between interacting protocols. A formalization of the COTS behavior has been proposed by (Guerrouat and Richter, 2005), using extended finite state automata.…”

Section: Introductionmentioning

confidence: 99%

A Design Method for Synthesizing Control-Command Systems out of Reusable Components

Hajjar

Dumitrescu

Praly

et al. 2014

IFAC Proceedings Volumes

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This paper investigates an industrial design issue related to code reusability: building control-command systems out of Commercial off the shelf (COTS) components. The design method proposed uses in synergy the formal verification (FV) and the discrete controller synthesis (DCS) techniques. COTS are formally specified using temporal logic and/or executable observers, and coded according to their formal specification. New functions are built by assembling COTS together. The COTS assembly operation is not error free: the resulting assembly may not achieve the desired function it is supposed to. For these reasons, COTS assemblies need to be formally verified and if errors are found, they must be corrected using DCS. The resulting system is ready for hardware (e.g. FPGA) implementation.

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Specification Enforcing Refinement for Convertibility Verification

Abstract: Abstract

Cited by 5 publications

References 18 publications

Safe design method of embedded control systems. Case study

Safe design method of embedded control systems. Case study

Conception sûre de systèmes de contrôle-commande matériels à base de COTS

A Design Method for Synthesizing Control-Command Systems out of Reusable Components

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