Specification, Synthesis, and Verification of Hazard-Free Asynchronous Circuits

Asynchronous circuit synthesis: persistency and complete state coding constraints in signal transition graphs

“…We derive the conditions under which a persistency violation leads to a complete state coding violation. Moon et al (1991) showed that only CSC constraints are sufficient to ensure a speed-independent implementation of a live STG assuming the unbounded gate Downloaded by [York University Libraries] at 10:32 05 January 2015 delay model. Although the sufficiency of CSC constraint was proved, the conditions under which a persistency violation is related to CSC were not established.…”

Asynchronous circuit synthesis with Boolean satisfiability

“…In asynchronous circuit research, signal transition graphs that use Petri nets 23] as an underlying formalism have captured wide attention 15,20,22,29,38]. A Petri net 23] is a bipartite directed graph, < P; T; F; M 0 >, consisting of a nite set of transitions T (represented as bars), a nite set of places P (represented as circles), and a ow relation F P T T P (represented as directed arcs) specifying a binary relation between transitions and places.…”

“…It has been proved that these syntactic constraints can only remove the undesirable behavior at the functional level 22]. It was also proved that the persistency constraint is redundant and only CSC constraint is necessary and su cient for ensuring a logic implementation 15,22].…”

“…It does not provide a succinct way of handling control-intensive asynchronous circuits that have rich concurrent behavior. Recently event-based asynchronous speci cation such as signal transition graphs (STG) has captured wide attention due to its simplicity and ability to describe a variety of asynchronous behavior and to make performance analysis 15,20,22,28,38]. The STG methods can e ectively utilize global optimization techniques to maximize control parallelism, reduce circuit area, and enhance circuit performance.…”