SPICE-compatible compact model for graphene field-effect transistors

Henry, M.; Das, Shamik

doi:10.1109/iscas.2012.6271815

Cited by 16 publications

(12 citation statements)

References 10 publications

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“…Thus, (17) is composed of several parts. C G,CH and C SUB,CH are physical capacitors that model the coupling between gate/channel and channel/substrate, respectively, empirically modeled by (18). C DIBL,D and C DIBL,S are effective capacitors that model the drain-induced barrier-lowering (DIBL) effect.…”

Section: A Single Gnr Modelmentioning

confidence: 99%

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A SPICE-Compatible Model of MOS-Type Graphene Nano-Ribbon Field-Effect Transistors Enabling Gate- and Circuit-Level Delay and Power Analysis Under Process Variation

Chen

Sangai

Rogachev

et al. 2015

IEEE Trans. Nanotechnology

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This paper presents the first parameterized, SPICEcompatible compact model of a Graphene Nano-Ribbon FieldEffect Transistor (GNRFET) with doped reservoirs, also known as MOS-type GNRFET. The current and charge models closely match numerical TCAD simulations. In addition, process variation in transistor dimension, line edge roughness, and doping level in the reservoirs are accurately modeled. Our model provides a means to analyze delay and power of graphene-based circuits under process variation, and offers design and fabrication insights for graphene circuits in the future. We show that line edge roughness severely degrades the advantages of GNRFET circuits; however, GNRFET is still a good candidate for lowpower applications.

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Section: A Single Gnr Modelmentioning

confidence: 99%

“…Note that there has been research on modeling either CNFETs [16], [17] or Graphene FETs (GFETs 1 [18]) in which such parameterized compact models are proposed, but we are the first to do so on GNRFETs. We have released this model on NanoHub [19] to aid designers in exploring graphenebased circuits and evaluating their potentials.…”

Section: Introductionmentioning

confidence: 99%

A SPICE-Compatible Model of MOS-Type Graphene Nano-Ribbon Field-Effect Transistors Enabling Gate- and Circuit-Level Delay and Power Analysis Under Process Variation

Chen

Sangai

Rogachev

et al. 2015

IEEE Trans. Nanotechnology

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“…A threshold voltage model has equally been reported elsewhere [18]. There a fitting parameter is used along with a polynomial of the effective back-gate voltage, whereas in the proposed model the threshold voltage is calculated from the equivalent capacitance model and only C e is adjusted to fit the experiment.…”

Section: A Bilayer Fet Validationmentioning

confidence: 99%

“…The availability of experimental data as well as the need to design circuits have led to an extensive research into compact models which supplements the RF models [11], [14], [15], [16], [17], [18], [19].…”

Section: Introductionmentioning

confidence: 99%

Multilayer Graphene FET Compact Circuit-Level Model With Temperature Effects

Umoh¹,

Kázmierski²,

Al-Hashimi³

2014

IEEE Trans. Nanotechnology

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Abstract-This paper presents a circuit-level model of a dualgate bilayer and four layer graphene field effect transistor (GFET). The model provides an accurate estimation of the conductance at the charge neutrality point (CNP). At the CNP the device has its maximum resistance, at which the model is validated against experimental data of the device off-current for a range of electric fields perpendicular to the channel. The model shows a good agreement for validations carried out at constant and varying temperatures. Using the general Schottky equation, the model estimates the amount of bandgap opening created by the application of an electric field. Also the model shows good agreement when validated against experiment for the channel output conductance against varying gate voltage for both a bilayer and four layer graphene channel.

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“…Compact models [14][15][16] analytically express the mechanism of operation of devices, providing acceptable accuracy in short calculation time. However, for novel lowdimensional nanodevices such as GFETs, understanding of their mechanism of operation is not as mature as for traditional, bulk devices.…”

Section: Introductionmentioning

confidence: 99%

Prior knowledge input neural network method for GFET description

Chang

et al. 2016

J Comput Electron

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For circuit design, various compact models for graphene field-effect transistors (GFETs) have been developed. However, the consistency between them is poor, since study on the mechanism of operation of GFETs is still immature and the models were derived based on different understandings. Herein, we propose another approach for circuit-level description of GFETs based on a prior knowledge input neural network modeling method. By virtue of the neural network's learning ability, it can accurately describe different GFETs without an exact description of their mechanism of operation. Basic knowledge on GFETs and an adaptive genetic algorithm are employed to improve the precision of the neural network, resulting in performance significantly exceeding that of a traditional, multilayer perceptron network. The universality of the method is verified by detailed tests using two different datasets. Its applicability for circuit design is demonstrated by relevant circuit simulations in a Verilog-A implementation.

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SPICE-compatible compact model for graphene field-effect transistors

Cited by 16 publications

References 10 publications

A SPICE-Compatible Model of MOS-Type Graphene Nano-Ribbon Field-Effect Transistors Enabling Gate- and Circuit-Level Delay and Power Analysis Under Process Variation

A SPICE-Compatible Model of MOS-Type Graphene Nano-Ribbon Field-Effect Transistors Enabling Gate- and Circuit-Level Delay and Power Analysis Under Process Variation

Multilayer Graphene FET Compact Circuit-Level Model With Temperature Effects

Prior knowledge input neural network method for GFET description

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