SPICE Implementation of the Dynamic Memdiode Model for Bipolar Resistive Switching Devices

Abstract

This paper reports the fundamentals and the SPICE implementation of the Dynamic Memdiode Model (DMM) for the conduction characteristics of bipolar-type resistive switching (RS) devices. Following Prof. Chua’s memristive devices theory, the memdiode model comprises two equations, one for the electron transport based on a heuristic extension of the quantum point-contact model for filamentary conduction in thin dielectrics and a second equation for the internal memory state related to the reversible displacement of atomic species within the oxide film. The DMM represents a breakthrough with respect to the previous Quasi-static Memdiode Model (QMM) since it describes the memory state of the device as a balance equation incorporating both the snapback and snapforward effects, features of utmost importance for the accurate and realistic simulation of the RS phenomenon. The DMM allows simple setting of the initial memory condition as well as decoupled modeling of the set and reset transitions. The model equations are implemented in the LTSpice simulator using an equivalent circuital approach with behavioral components and sources. The practical details of the model implementation and its modes of use are also discussed.

Experimental and Modeling Study of Metal–Insulator Interfaces to Control the Electronic Transport in Single Nanowire Memristive Devices

“…The script used for modeling is reported in Supporting Information, Figure S7 and contains five parts: parameter definition, memory state equation, current–voltage characteristic for the memristive device, current–voltage characteristic for the nanowire, and auxiliary functions. The memristive behavior is based on an adaptation of the memdiode model for resistive switching devices reported in ref . The model includes the snapback effect and an internal series resistance.…”

Variability in Resistive Memories

“…where I 0 and α are assumed to be linear functions of the memory state of the device λ. [164,165] In addition, notice that for α ! 0 (collapse of the confining barrier), ( 8) reduces again to I ¼ G 0 V. Since φ is assumed to be normally distributed, the current amplitude factor I 0 in ( 8) is lognormally distributed.…”

“…Further details about the Dynamic Memdiode Model can be found in refs. [164,165]. The model script is presented in Table 5.…”

Ternary Neural Networks Based on on/off Memristors: Set-Up and Training

“…R H 8 3 8 w q I l b g l 9 i / d N P O / O l W L R B 8 n u g a P a o o 1 o 6 p j m U u q u 6 J u b n 6 p S p J D T J z C P Y o L w k w r p 3 0 2 t S b R t a v e O j r + p j M V q / Y s y 0 3 x r m 5 J A 7 Z / j n M W N C p l + 6 h s X R y W q p V s 1 H n s Y B f 7 N M 9 j V H G G G u r k H e A R T 3 g 2 z g 1 p j I 3 J Z 6 q R y z T b + L a M h w 9 2 h Z I 1 < / l a t e x i t > w 1 1,2 < l a t e x i t s h a 1 _ b a s e 6 4 = " r b Let us briefly comment on the linearity of the memristor we are considering. According to the memdiode model [23], the I-V characteristic of a memristor reads as…”

“…• To adjust the conductance values in G j,+ and G j,− (i.e., to decide which memristors are set to g H and which are set to g L ); Note that we consider devices operating in the linear regime (i.e., in the low-voltage region), and thus nonlinearities in the I-V characteristic can be disregarded [23]. Beyond this point, the conductance of the devices may change as we move to the programming region, which is out of the scope of this work.…”