SPICE model for the single electron tunnel junction

Haar, R. van de; Klunder, R.H.; Hoekstra, Jaap

doi:10.1109/icecs.2001.957487

Cited by 8 publications

(2 citation statements)

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“…They are not equal to tunneling resistance (R T ) and tunneling capacitor (C T ) of a specific junction. In fact, the tunneling resistances of all junctions and all of the capacitors in a singleelectron circuit determine the tunneling rates through equations (8)(9)(10)(11), after that the R and C can be calculated (equation (12)). Therefore, there is not any direct relation between R, C and the tunneling resistance and the junction capacitor at all.…”

Section: Principles Of the New Time Transient Circuit Model For W-sedsmentioning

confidence: 99%

“…In addition, investigation on the compound circuits, which include SEDs and other circuit elements such as inductors, current sources, and MOS transistors, cannot be performed using these simulators. A great deal of work has also been done on the simulation of single-electron circuits using SPICE models [7][8][9][10][11][12][13][14]. The main problem of the introduced circuit models is that they are limited to low frequencies and low temperatures.…”

Section: Introductionmentioning

confidence: 99%

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A general SPICE compatible circuit model for single‐electron devices and application to bit‐error‐rate calculations

Sharifi

Jamshidnezhad

2013

Circuit Theory & Apps

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The main purpose of this paper is study of the single‐electron devices (SEDs) behavior, having metal islands, in the time domain. On this basis, some new conceptions, such as division of islands in independent type and dependent type and introduction of multi‐dimensional state space for a SED, have been presented. Then, a new circuit model is introduced for SEDs in general N‐dimensional case. This model is based on the orthodox theory and the solution of the time‐dependent master equation with the capability of installation in the HSPICE software. Hence, one can simulate behavior of the compound circuits including SEDs and other circuit elements by help of this model. Another interesting characteristic of the introduced circuit model is the possibility of using it in calculation of bit error rate in single‐electron logical gates considering both the time and the temperature effects. The behavior of various SEDs in low frequencies is studied, and the results are compared with the results of SIMON, often used as a reference. Furthermore, the time‐dependent results of these devices in high frequencies are calculated and compared with the analytic results for step inputs. These comparisons indicate accuracy and validity of the model. Finally, the model is used for simulating time‐dependent behavior of some single‐electron logic gates, and their total error rate are calculated. Copyright © 2013 John Wiley & Sons, Ltd.

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Section: Principles Of the New Time Transient Circuit Model For W-sedsmentioning

confidence: 99%