Spike‐driven gated recurrent neural network processor for electrocardiogram arrhythmias detection realised in 55‐nm CMOS technology

Abstract

In this Letter, an asynchronous spike‐driven processor based on gated recurrent neural network algorithm for electrocardiogram (ECG) cardiac arrhythmias detection has been designed. Based on the processor, the proposed ECG detection model, containing a many‐to‐many gated recurrent unit layer and a fully connected layer, can achieve a high classification overall accuracy of 97.8% using the MIT‐BIH arrhythmia database. The processor was fabricated in 55‐nm 1P6M CMOS technology. It integrates about 1.4 million logic gates, including 40 KB of on‐chip memory within a 4.0 thinmathspacenormalmm2 die area. The test chip consumes 6.28 mW at real‐time operation frequency (200 MHz) with 1.2 V core supply voltage and 2.65 thinmathspaceμW at 1 kHz.

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