Spike time dependent plasticity (STDP) enabled learning in spiking neural networks using domain wall based synapses and neurons

Abstract

We have implemented a Spiking Neural Network (SNN) architecture using a combination of spin orbit torque driven domain wall devices and transistor based peripheral circuits as both synapses and neurons. Learning in the SNN hardware is achieved both under completely unsupervised mode and partially supervised mode through mechanisms, incorporated in our spintronic synapses and neurons, that have biological plausibility, e.g., Spike Time Dependent Plasticity (STDP) and homoeostasis. High classification accuracy is obtained on the popular Iris dataset for both modes of learning.

Training of a Spiking Neural Network on spintronics based analog hardware for handwritten digit recognition

“…However the partially supervised nature comes from applying bias currents to the output stage neurons or post-neurons only during the learning phase to control them and make them fire selectively (Fig. 1(b)) [20], [24], [41], [42]. While SNN has been trained on simple datasets like the Fisher's Iris dataset and Wisconsin Breast Cancer dataset under the partially supervised mode in the previous reports [20], [24], [41], [42], training on a more complex dataset involving more input features and more output classes like the MNIST dataset has not been demonstrated before whether with spintronic hardware or otherwise, to the best of our knowledge.…”

“…3. Earlier works [24], [43] only report the energy consumed in the spintronic devices themselves for the STDP enabled learning. In this paper, we have reported the net energy consumed in the peripheral transistor circuits as well.…”

“…N 2 = 400 post-neurons are used with several neurons designed to spike corresponding to the different variations with which the same digit is written, using the homoeostasis property as discussed in [6], [21]. However, as mentioned in Section I, [6] and [21] use a separate layer of excitatory neurons and a separate layer of inhibitory neurons at the output stage, unlike here where we use only a single layer of post-neurons [24], [41], [42]. Thus our network is simpler in design than that in [6], [21].…”

“…Hence such time dynamics is computed automatically. Spintronic devices, coupled with transistor based electronic circuits, form one such class of emerging devices [18]- [24].…”

“…1. The same kind of spintronic device can enable both neuron and synapse functionality [18], [21], [24]. The nature of the transistor based circuit connected to it just changes in either case.…”