We have implemented a Spiking Neural Network (SNN) architecture using a combination of spin orbit torque driven domain wall devices and transistor based peripheral circuits as both synapses and neurons. Learning in the SNN hardware is achieved both under completely unsupervised mode and partially supervised mode through mechanisms, incorporated in our spintronic synapses and neurons, that have biological plausibility, e.g., Spike Time Dependent Plasticity (STDP) and homoeostasis. High classification accuracy is obtained on the popular Iris dataset for both modes of learning.
We trained <b>Spiking neural network </b>(SNN) using <b>spike time dependent plasticity (STDP)</b>-enabled learning under two different learning schemes in <b>MNIST data set</b>(hand written digit recognition). We showed how the post-neurons need to be far more in number than the output classes for larger data sets in the case of SNN for reasonably high accuracy number. We have also reported the net energy consumed for learning in the spintronic devices and associated transistor-based circuits that enable synaptic functionality for this SNN.
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