Spintronic leaky-integrate-fire spiking neurons with self-reset and winner-takes-all for neuromorphic computing

Abstract

Neuromorphic computing using nonvolatile memories is expected to tackle the memory wall and energy efficiency bottleneck in the von Neumann system and to mitigate the stagnation of Moore’s law. However, an ideal artificial neuron possessing bio-inspired behaviors as exemplified by the requisite leaky-integrate-fire and self-reset (LIFT) functionalities within a single device is still lacking. Here, we report a new type of spiking neuron with LIFT characteristics by manipulating the magnetic domain wall motion in a synthetic antiferromagnetic (SAF) heterostructure. We validate the mechanism of Joule heating modulated competition between the Ruderman–Kittel–Kasuya–Yosida interaction and the built-in field in the SAF device, enabling it with a firing rate up to 17 MHz and energy consumption of 486 fJ/spike. A spiking neuron circuit is implemented with a latency of 170 ps and power consumption of 90.99 μW. Moreover, the winner-takes-all is executed with a current ratio >104 between activated and inhibited neurons. We further establish a two-layer spiking neural network based on the developed spintronic LIFT neurons. The architecture achieves 88.5% accuracy on the handwritten digit database benchmark. Our studies corroborate the circuit compatibility of the spintronic neurons and their great potential in the field of intelligent devices and neuromorphic computing.

CMOS-compatible neuromorphic devices for neuromorphic perception and computing: a review

“…Figures 5(g) and (h) illustrate the LIF and LIFT characteristics, respectively. Using a synthetic antiferromagnetic heterostructure to control the magnetic domain wall motion by Joule heating, which enables the device to fire spikes with a high rate and low energy consumption [85]. These results show a novel way of implementing bio-inspired spiking neurons with spintronic devices that have advantages over traditional CMOS or emerging nonvolatile memory technologies.…”

Switching of Perpendicular Magnetization by Spin–Orbit Torque

“…[183] Motion and switching of perpendicular magnetic anisotropy domains by spin-orbit torque and chiral coupling have also been demonstrated to enable "NOT", "NAND", and "NOR" gates (Figure 18b). [184] Based on SOT-driven magnetic domain wall motion in synthetic antiferromagnetic heterostructures, Wang et al [186] have recently demonstrated spintronic leaky-integrate-fire spiking neurons with self-reset and winner-takes-all for neuromorphic computing. These advances in prototype devices shall stimulate future efforts on developing more energy-efficient perpendicular SOT logic devices.…”

“…[ 184 ] Based on SOT‐driven magnetic domain wall motion in synthetic antiferromagnetic heterostructures, Wang et al. [ 186 ] have recently demonstrated spintronic leaky‐integrate‐fire spiking neurons with self‐reset and winner‐takes‐all for neuromorphic computing. These advances in prototype devices shall stimulate future efforts on developing more energy‐efficient perpendicular SOT logic devices.…”

Multistate Compound Magnetic Tunnel Junction Synapses for Digital Recognition

“…Early works have shown the potential of binary states (P/AP) MTJs as artificial synapsesfunctional junctions between neuronsin emulating short-term plasticity and long-term potentiation for learning and cognition processes. , Furthermore, artificial synapses endowed with multistate (>2) digital or analog functionalities are posited to be more energy-efficient with enhanced learning accuracy and data acquaintance. − Multistate or analog artificial synapse concepts built upon spatially varied arrangements of MTJs, e.g., in series, and domain wall racetracks, have been explored, albeit with weakly differentiated TMR (<5%) between states, unreliable read-write arising from their inherent thermal instability, and incompatibility with existing CMOS architectures. ,− On the other hand, the design of a compound synapse comprising a parallel array of MTJs on a shared SOT write channel has not been realized until date . Such a design potentially offers well-defined independent states and a reduced number of dedicated transistors for individual bit readout and write operations in the artificial neural network (ANN).…”