Stabilization and Specification in Polymer Field-Effect Transistor Semiconductors

Katz, Howard E.

doi:10.1021/acsami.2c00649

Cited by 4 publications

(3 citation statements)

References 60 publications

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“…Note that drifts are actually current decreases while response signals are current increases, so the net sensitivity over time is even larger than tabulated here. Also, such drifts can be minimized with compensating circuitry. − …”

Section: Resultsmentioning

confidence: 99%

Polymeric Semiconductor in Field-Effect Transistors Utilizing Flexible and High-Surface Area Expanded Poly(tetrafluoroethylene) Membrane Gate Dielectrics

Bond,

Katz,

Frydrych

et al. 2024

ACS Appl. Mater. Interfaces

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Organic field-effect transistors (OFETs) were fabricated using three high-surface area and flexible expanded-poly(tetrafluoroethylene) (ePTFE) membranes in gate dielectrics, along with the semiconducting polymer poly[2,5-bis(2-octyldodecyl)pyrrolo[3,4-c]pyrrole-1,4(2H,5H)-dione-3,6-diyl)-alt-(2,2′:5′,2″:5″,2‴-quaterthiophen-5,5‴-diyl)] (PDPP4T). The transistor behavior of these devices was investigated following annealing at 50, 100, 150, and 200 °C, all sustained for 1 h. For annealing temperatures above 50 °C, the OFETs displayed improved transistor behavior and a significant increase in output current while maintaining similar magnitudes of V th shifts when subjected to static voltage compared to those kept at ambient temperature. We also tested the response to NO2 gas for further characterization and for possible applications. The ePTFE–PDPP4T interface of each membrane was characterized via scanning electron microscopy for all four annealing temperatures to derive a model for the hole mobility of the ePTFE–PDPP4T OFETs that accounts for the microporous structure of the ePTFE and consequently adjusts the channel width of the OFET. Using this model, a maximum hole mobility of 1.8 ± 1.0 cm2/V s was calculated for the polymer in an ePTFE–PDPP4T OFET annealed at 200 °C, whereas a PDPP4T OFET using only the native silicon wafer oxide as a gate dielectric exhibited a hole mobility of just 0.09 ± 0.03 cm2/V s at the same annealing condition. This work demonstrates that responsive semiconducting polymer films can be deposited on nominally nonwetting and extremely bendable membranes, and the charge carrier mobility can be significantly increased compared to their as-prepared state by using thermally durable polymer membranes with unique microstructures as gate dielectrics.

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Section: Resultsmentioning

confidence: 99%

Polymeric Semiconductor in Field-Effect Transistors Utilizing Flexible and High-Surface Area Expanded Poly(tetrafluoroethylene) Membrane Gate Dielectrics

Bond,

Katz,

Frydrych

et al. 2024

ACS Appl. Mater. Interfaces

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“…Moreover, the uniformity of these materials is poorly controlled when using the thermal evaporation deposition, and the prepared small-molecule films are rough, which is unfavorable for the growth of semiconductors and such films cannot be prepared in large areas. Existing research has found that organic polymer semiconductors are a kind of ideal floating-gate dielectrics that have the following advantages: low cost, workable solution, and programmable molecules, and can be prepared on flexible substrates [24,25]. Therefore, selecting organic polymer semiconductors as floating-gate materials and optimizing their nanostructures (size and distribution) are critical for high-performance memory devices [26,27].…”

Section: Introductionmentioning

confidence: 99%

A flexible floating-gate based organic field-effect transistor non-volatile memory based on F8BT/PMMA integrated floating-gate/tunneling layer

shu

2023

Phys. Scr.

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The solution mixing method was adopted to build polymer semiconductor poly(9,9-dioctylflfluorene-co-benzothiadiazole) (F8BT) nanoparticles (NPs), which were mixed with poly (methyl methacrylate) (PMMA) in a solution to prepare an integrated floating-gate/tunneling layer. On this basis, flexible floating-gate based organic field-effect transistor non-volatile memories (F-OFET-NVMs) were prepared. The intrinsic correlations of the microstructures in the integrated floating-gate/tunneling layer of the memory devices with the device performance were explored. Moreover, correlations of the charge injection and discharge, physical mechanism of memory, and charge trapping capacity of the floating-gate/tunneling layer with different F8BT/PMMA mass ratios with the key parameters of memory devices were investigated. Relevant results indicate that the memory devices are able to well trap charges inside the F8BT NPs during operation at a programming voltage of +40 V, an erasing voltage of -40 V, and a pulse width of 1 s. The floating gate acquires the injected and trapped bipolar charges (electrons and holes). The optimized high-performance memory device is found to have an average memory window of 9.5 V, remain stable for more than three years, and have reliable stability in more than 100 erase/write cycles. Furthermore, the memory device also exhibits outstanding durability under mechanical bending and still has high storage stability after 6,000 times of bending with a bending radius of 3 mm. The research results powerfully promote the research progress of applying semiconductor polymers to memory devices.

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“…[ 1–3 ] In recent years, a wide variety of OFETs based on polymeric semiconductors have been developed because the physical and chemical properties of polymeric semiconductors are well‐suited for OFETs and may serve as potential alternatives to silicon‐based semiconducting materials. [ 4–6 ] Depending on the dominant charge carriers in the channel layer of the OFETs, polymeric semiconductors can be classified as p‐type, n‐type, or ambipolar (both p‐ and n‐type) semiconductors, facilitating the movement of holes, electrons, and both holes and electrons, respectively. [ 7 ] The type of polymeric semiconductor used as an OFET active channel layer is primarily determined by the highest occupied molecular orbital (HOMO) and lowest unoccupied molecular orbital (LUMO) energy levels of the polymeric semiconductor.…”

Section: Introductionmentioning

confidence: 99%

Well‐Balanced Ambipolar Charge Transport of Diketopyrrolepyrrole‐Based Copolymers: Organic Field‐Effect Transistors and High‐Voltage Logic Applications

Song

Kim

Jung

et al. 2023

Macromol. Rapid Commun.

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A poly (3,6‐bis(thiophen‐2‐yl)−2,5‐bis(2‐decyltetradecyl)−2,5‐dihydropyrrolo[3,4‐c]pyrrole‐1,4‐dione‐co‐(2,3‐bis(phenyl)acrylonitrile)) (PDPADPP) copolymer, composed of diketopyrrolopyrrole (DPP) and a cyano (nitrile) group with a vinylene spacer linking two benzene rings, is synthesized via a palladium‐catalyzed Suzuki coupling reaction. The electrical performance of PDPADPP in organic field‐effect transistors (OFETs) and circuits is investigated. The OFETs based on PDPADPP exhibit typical ambipolar transport characteristics, with the as‐cast OFETs demonstrating low field‐effect hole and electron mobility values of 0.016 and 0.004 cm2 V−1 s−1, respectively. However, after thermal annealing at 240 °C, the OFETs exhibit improved transport characteristics with highly balanced ambipolar transport, showing average hole and electron mobility values of 0.065 and 0.116 cm2 V−1 s−1, respectively. To verify the application of the PDPADPP OFETs in high‐voltage logic circuits, compact modeling using the industry‐standard small‐signal Berkeley short‐channel IGFET model (BSIM) is performed, and the logic application characteristics are evaluated. The circuit simulation results demonstrate excellent logic application performance of the PDPADPP‐based ambipolar transistor and illustrate that the device annealed at 240 °C exhibits ideal circuit characteristics.

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Stabilization and Specification in Polymer Field-Effect Transistor Semiconductors

Cited by 4 publications

References 60 publications

Polymeric Semiconductor in Field-Effect Transistors Utilizing Flexible and High-Surface Area Expanded Poly(tetrafluoroethylene) Membrane Gate Dielectrics

Polymeric Semiconductor in Field-Effect Transistors Utilizing Flexible and High-Surface Area Expanded Poly(tetrafluoroethylene) Membrane Gate Dielectrics

A flexible floating-gate based organic field-effect transistor non-volatile memory based on F8BT/PMMA integrated floating-gate/tunneling layer

Well‐Balanced Ambipolar Charge Transport of Diketopyrrolepyrrole‐Based Copolymers: Organic Field‐Effect Transistors and High‐Voltage Logic Applications

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