Stacked Switched Capacitor Energy Buffer Architecture

Abstract

Electrolytic capacitors are often used for energy buffering applications, including buffering between single-phase ac and dc. While these capacitors have high energy density compared to film and ceramic capacitors, their life is limited and their reliability is a major concern. This thesis presents a series of stacked switched capacitor (SSC) energy buffer architectures which overcome this limitation while achieving comparable effective energy density without electrolytic capacitors. The architectural approach is introduced along with design and control techniques which enable this energy buffer to interface with other circuits. A prototype SSC energy buffer using film capacitors, designed for a 320 V dc bus and able to support a 135 W load has been built and tested with a power factor correction circuit.This thesis starts with a detailed comparative study of electrolytic, film, and ceramic capacitors, then introduces the principles of SSC energy buffer architectures, and finally designs and explains the design methodologies of a prototype circuit. The experimental results successfully demonstrate the effectiveness of the approach.

Power conversion architecture for grid interface at high switching frequency

“…It can achieve reasonably high power factor (e.g., about 0.9, which is sufficient for many applications such as LED driver circuits), while dynamically buffering twice-line frequency energy using small capacitors operating at moderate voltages and voltage swings. The proposed converter thus shares the benefits of some "third port" architectures for buffering line frequency energy (e.g., [6]- [12]), in that it can achieve high energy storage density without the need for electrolytic capacitors. Moreover, it enables high switching frequencies to be achieved (above 3 MHz) with relatively low voltage components, yielding high efficiency and high power density.…”

Stacked switched capacitor energy buffer architecture

“…Hence, even though the buffer port voltage varies only over a small range, the capacitors charge and discharge over a wide range to buffer substantial energy. This enables high effective 1 Energy buffering ratio (Γ b ) is defined as the ratio of the energy that can be injected and extracted from an energy buffer in one cycle to the total energy capacity of the buffer, i.e.,…”

“…These considerations directly limit the energy buffering capability of electrolytic capacitors at 120 Hz. Thus, while peak energy densities of up to 0.8 J/cm 3 can typically be achieved with commercially available electrolytic capacitors at the voltage and power levels we consider, the allowable energy swing at 120 Hz yields practical energy densities that are significantly lower [1]. Film capacitors typically have peak energy densities of only about 0.1 J/cm 3 .…”

“…When used with other energy-storage types, such as ultracapacitors, the proposed approach is also applicable to energy buffering applications at high powers and long time-scales. This work represents an expansion on our earlier conference paper [2], and includes a more detailed explanation of the new energy buffer architecture, additional experimental results and estimates of loss breakdown. The remainder of this paper is organized as follows: Section II describes the past work on film-capacitor-based energy buffers and switchedcapacitor-based energy storage architectures.…”

High-frequency isolated ac-dc converter with stacked architecture

“…The proposed ac-dc converter addresses converter miniaturization through high-frequency operation while main- taining good efficiency, and achieves reasonably high power factor consistent with line harmonic requirements [5], while dynamically buffering twice-line frequency energy at moderate voltages with large voltage swings [17]- [23]. Section II of the paper describes the structure and operation of the proposed stacked ac-dc architecture.…”