Stateful Logic Using Phase Change Memory

Abstract

Stateful logic is a digital processing-in-memory technique that could address von Neumann memory bottleneck challenges while maintaining backward compatibility with standard von Neumann architectures. In stateful logic, memory cells are used to perform the logic operations without reading or moving any data outside the memory array. Stateful logic has been previously demonstrated using several resistive memory types, mostly by resistive RAM (RRAM). Here we present a new method to design stateful logic using a different resistive memoryphase change memory (PCM). We propose and experimentally demonstrate four logic gate types (NOR, IMPLY, OR, NIMP) using commonly used PCM materials. Our stateful logic circuits are different than previously proposed circuits due to the different switching mechanism and functionality of PCM compared to RRAM. Since the proposed stateful logic form a functionally complete set, these gates enable sequential execution of any logic function within the memory, paving the way to PCM-based digital processing-in-memory systems.Index Terms-phase-change-memory (PCM), processing-inmemory (PIM), stateful-logic I. INTRODUCTIONF OR the last 75 years, computers have been typically designed in the von Neumann architecture, which separates the memory from the processing units. While their programming model is simple, incessant data movement limits system performance because memory access time is often substantially longer than the computing time. This bottleneck has worsened over the years since CPU speed has improved more than memory speed and bandwidth (the so-called 'memory wall') [1]. One attractive approach to deal with this problem is processing-in-memory (PIM), which suggests adding computation capabilities to the memory. PIM reduces the need for costly (in terms of processing-speed, bandwidth, and energy) chip-to-chip transfers, thus yielding higher performance and energy efficiency [2].An increasing number of applications from highperformance computing (HPC) to databases, data analytics and deep neural networks require higher memory capacity to meet the needs of workloads with large data sets. DRAM scaling has slowed down in the last years, and it has become Manuscript

Ultra-Low Power Logic in Memory with Commercial Grade Memristors and Fpga-Based Smart-Imply Architecture

“…The platform is then exploited to evaluate the energy efficiency performances of the innovative Smart-IMPLY (SIMPLY) computing framework [32], a recently introduced LiM paradigm, which are then compared with those of the traditional CMOS counterpart. Although implemented with commercial grade memristors, the same methodology is applicable to other memristive technologies, such as RRAMs or phase change memories (PCM) [33].…”