Stateful Reconfigurable Logic via a Single-Voltage-Gated Spin Hall-Effect Driven Magnetic Tunnel Junction in a Spintronic Memory

Zhang, He; Wang, Kang; Wang, Lezhi; Wang, Kang L.

doi:10.1109/ted.2017.2726544

Cited by 79 publications

(24 citation statements)

References 32 publications

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“…Spin logic using SOTs has also drawn enormous attention, with the prospect of using spin rather than charge to process information. The reconfigurable spin logic and the complementary logic operation have been reported based on the SOTs and VCMA . These attempts are just simply demoed and further investigations for programmable, ultrafast, and multifunctional spin logic devices based on SOTs are extremely necessary.…”

Section: Discussionmentioning

confidence: 99%

Manipulation of Magnetization by Spin–Orbit Torque

Edmonds

Liu

et al. 2018

Adv Quantum Tech

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The control of magnetization by electric current is a rapidly developing area motivated by a strong synergy between breakthrough basic research discoveries and industrial applications in the fields of magnetic recording, magnetic field sensors, spintronics, and nonvolatile memories. In recent years, the discovery of spin–orbit torque has opened a spectrum of opportunities to manipulate the magnetization efficiently. This article presents a review of the historical background and recent literature focusing on spin–orbit torques (SOTs), highlighting the most exciting new scientific results and suggesting promising future research directions. It starts with an introduction and overview of the underlying physics of spin–orbit coupling effects in bulk and at interfaces, and then describes the use of SOTs to control ferromagnets and antiferromagnets. Finally, the prospects for the future development of spintronic devices based on SOTs are summarized.

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Section: Discussionmentioning

confidence: 99%

Manipulation of Magnetization by Spin–Orbit Torque

Edmonds

Liu

et al. 2018

Adv Quantum Tech

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“…Out of all the non-volatile technologies, spin based devices are the only devices that have high switching speed as well as unlimited endurance. Few works on stateful computations using spin devices can be found in refs 24 – 26 . Specifically, the work presented in ref.…”

Section: Introductionmentioning

confidence: 99%

“…Specifically, the work presented in ref. 24 uses a three terminal device exploiting the spin Hall effect and the voltage controlled magnetic anisotropy (VCMA) in spin devices to do stateful computations. However, one of the inputs to these devices is an electrical quantity i.e .…”

Section: Introductionmentioning

confidence: 99%

“…In addition, as opposed to the work in ref. 24 , we do not need to represent the logic operands by an electrical input, rather both the logic operands can be stored in the memory array leading to higher throughput. We have developed a detailed device-circuit model comprising of self-consistent magnetization dynamics and electron transport model integrated seamlessly in SPICE environment to study the feasibility of the proposed logic computations.…”

Section: Introductionmentioning

confidence: 99%

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In-situ, In-Memory Stateful Vector Logic Operations based on Voltage Controlled Magnetic Anisotropy

Jaiswal

Agrawal

Roy

2018

Sci Rep

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Recently, the exponential increase in compute requirements demanded by emerging applications like artificial intelligence, Internet of things, etc. have rendered the state-of-art von-Neumann machines inefficient in terms of energy and throughput owing to the well-known von-Neumann bottleneck. A promising approach to mitigate the bottleneck is to do computations as close to the memory units as possible. One extreme possibility is to do in-situ Boolean logic computations by using stateful devices. Stateful devices are those that can act both as a compute engine and storage device, simultaneously. We propose such stateful, vector, in-memory operations using voltage controlled magnetic anisotropy (VCMA) effect in magnetic tunnel junctions (MTJ). Our proposal is based on the well known manufacturable 1-transistor - 1-MTJ bit-cell and does not require any modifications in the bit-cell circuit or the magnetic device. Instead, we leverage the very physics of the VCMA effect to enable stateful computations. Specifically, we exploit the voltage asymmetry of the VCMA effect to construct stateful IMP (implication) gate and use the precessional switching dynamics of the VCMA devices to propose a massively parallel NOT operation. Further, we show that other gates like AND, OR, NAND, NOR, NIMP (complement of implication) can be implemented using multi-cycle operations.

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“…With the emerging of non-volatile memories, it becomes possible to address this issue [10], [11], for example, STT-MRAM (Spin Transfer Torque Magnetic RAM), RRAM (Resistive RAM), SOT-MRAM (Spin Orbit Torque Magnetic RAM) and other spintronics based devices, logics or memories, etc. [12], [13], [14]. STT-MRAM has been considered as one of the most promising candidates due to its distinctive advantages over other non-volatile memories, such as, nonvolatility, good scalability, compatibility with CMOS, ultra fast accessing speed, etc.…”

Section: Introductionmentioning

confidence: 99%

A Robust Dual Reference Computing-in-Memory Implementation and Design Space Exploration Within STT-MRAM

Zhang

Wang

Cai

et al. 2018

2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

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Due to the "memory wall" in conventional Von-Neumann computer architectures, the limited bandwidth between processors and memories has become one of the most critical bottlenecks to improve system performance. With the emerging of non-volatile memories, the computing-in-memory (CIM) paradigm has regained interest to tackle the issue at the architecture level. CIM can effectively alleviate the stress on the limitted bandwidth by performing logic operations within memories. However, CIMs are not yet studied carefully at the circuit level, and even its reliability and performance. In this paper, we proposed a CIM implementation: dual reference (DualRef) scheme at the circuit level within STT-MRAM (Spin Transfer Torque Magnetic Random Access Memory) array. Simulations were carried out to verify the functionality and assess the reliability and performance of DualRef scheme in terms of operation error rate, sensing margin, operation delay and dynamic energy consumption. Simulation results validate DualRef scheme and reveal that it is reliable to perform bitwise logic opertions within STT-MRAM while the TMR (Tunnel Magnetoresistance Ratio) varying between 100% and 300% and supply voltage Vdd varying from 0.9V to 1.2V. This work provides a robust circuitry scheme and design space to effectively implement CIM in STT-MRAM.

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Stateful Reconfigurable Logic via a Single-Voltage-Gated Spin Hall-Effect Driven Magnetic Tunnel Junction in a Spintronic Memory

Cited by 79 publications

References 32 publications

Manipulation of Magnetization by Spin–Orbit Torque

Manipulation of Magnetization by Spin–Orbit Torque

In-situ, In-Memory Stateful Vector Logic Operations based on Voltage Controlled Magnetic Anisotropy

A Robust Dual Reference Computing-in-Memory Implementation and Design Space Exploration Within STT-MRAM

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