“…BIST is a mode of operation of a chip other than its normal mode, where when a chip is switched to this mode, it performs its test by itself. Nowadays mixed-mode testing approach [31][32][33][34][35] is the state of the art technique for BIST implementation where the ASIC is tested using both pseudo-random test patterns for easy to test faults and deterministic test patterns for hard to detect faults, and thereby, maximum fault coverage is achieved. In this research, the mixed-mode BIST technique has been incorporated into the design of the AES cryptoprocessor ASIC.…”