StealthWorks: Emulating Memory Errors

Rahman, Musfiq; Childers, Bruce R.; Cho, Sangyeun

doi:10.1007/978-3-642-16612-9_27

Cited by 5 publications

(4 citation statements)

References 4 publications

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“…To author's knowledge, there is a lack of tools which would provide such model. The purpose of existing memory fault simulators [2][3] [4][5] [6] is to evaluate memory test procedures and impact of memory faults on an operating system or software. Memory models generated by existing memory fault simulators cannot by used for complete system simulations or emulations.…”

Section: Fig 1 Elements Of the Fault Injection Frameworkmentioning

confidence: 99%

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Fault Injection Framework for embedded memories

Skoncej

2013

2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)

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Due to scalability issues of existing semiconductor memories emerging non-volatile memory technologies are gaining increasing interest. Their promising features like non-volatility, low-power consumption, and great scalability are expected to meet demands of upcoming digital systems. Unfortunately, due to their characteristics they often require special management. Moreover, due to certain properties, e.g. like limited endurance, their applicability in some cases can be restricted. As a result, selection of a non-volatile technology appropriate for a target system can be difficult. This paper proposes an approach which facilitates a design process of a system incorporating non-volatile memories. It presents a tool which generates non-volatile memory model which can be used not only in system's simulations but also in emulations in hardware.

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Section: Fig 1 Elements Of the Fault Injection Frameworkmentioning

confidence: 99%

“…they decrease endurance of memory cells. Moreover, before new data can be stored in the memory, first, memory has to be erased 6. The use of Normal distribution for modeling memory's endurance is a common practice for evaluating FLP techniques[7][8][9].…”

mentioning

confidence: 99%

Fault Injection Framework for embedded memories

Skoncej

2013

2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)

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“…The impact of soft errors is an important emerging concern in the design and implementation of future microprocessors. A considerable amount of research at the microarchitecture level has conducted fault injection studies using softwarebased methods [37], [38], [39], [40], [41], [42]. They focus on understanding how errors in low-level circuits or hardware structures manifest at the architecture level.…”

Section: F Impact Of Errorsmentioning

confidence: 99%

Cross-Layer Early Reliability Evaluation for the Computing cOntinuum

Carlo

Vallero

Gizopoulos

et al. 2014

2014 17th Euromicro Conference on Digital System Design

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“…We injected 200 to 1,600 errors in steps of 200 with a framework for memory error emulation [18]. From a profile, we determined the physical pages that were likely to be used, and these pages received the errors.…”

Section: F Detecting Errorsmentioning

confidence: 99%

COMeT: Continuous Online Memory Test

Rahman

Childers

Cho

2011

2011 IEEE 17th Pacific Rim International Symposium on Dependable Computing

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Abstract-Today's computers have gigabytes of main memory due to improved DRAM density. As density increases, smaller bit cells become more susceptible to errors. With an increase in error susceptibility, the need for memory resiliency also increases. Self-testing of memory health can proactively check for errors to improve resiliency. This paper describes a software-only selftest to continuously test memory. We present the challenges and design for an approach, called Continuous Online Memory Testing (COMeT), that targets chip multiprocessors. COMeT tests memory health simultaneously with application execution in anticipation of allocation requests. The approach guarantees that memory is tested within a fixed time interval to limit exposure to lurking errors. We developed and evaluated an implementation of COMeT. On the SPEC CPU2006 benchmarks, COMeT has a low 4% average performance overhead. When emulated errors were injected into physical memory, applications executed 1.13x to 4.41x longer with COMeT than without it.

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StealthWorks: Emulating Memory Errors

Cited by 5 publications

References 4 publications

Fault Injection Framework for embedded memories

Fault Injection Framework for embedded memories

Cross-Layer Early Reliability Evaluation for the Computing cOntinuum

COMeT: Continuous Online Memory Test

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