2018
DOI: 10.1007/978-3-319-95582-7_16
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Stepwise Development and Model Checking of a Distributed Interlocking System - Using RAISE

Abstract: This paper considers the challenge of designing and verifying control protocols for geographically distributed railway interlocking systems. It describes for a real-world case study how this can be tackled by stepwise development and model checking of state transition models in an extension of the RAISE Specification Language (RSL). This method also allows different variants of the control protocols to be explored.

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Cited by 4 publications
(4 citation statements)
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“…The refined version of the protocol would also need to solve another type of deadlock scenario which would occur once railway routes are introduced into the model. Specifically, the head-to-head deadlock scenario, which can occur when two trains cannot progress as each train is preventing the other one from locking the next set of resources (example discussed in Section 7.1.4 of [GH21]). In the future work we could address this issue by extending the protocol to specify how objectives are formed and selected.…”
Section: Discussionmentioning
confidence: 99%
“…The refined version of the protocol would also need to solve another type of deadlock scenario which would occur once railway routes are introduced into the model. Specifically, the head-to-head deadlock scenario, which can occur when two trains cannot progress as each train is preventing the other one from locking the next set of resources (example discussed in Section 7.1.4 of [GH21]). In the future work we could address this issue by extending the protocol to specify how objectives are formed and selected.…”
Section: Discussionmentioning
confidence: 99%
“…In [HHP17], we have shown that bounded model checking in combination with k-induction can cope with the size of real-world route-based interlocking systems for verifying their behaviour. As an alternative to the B-family, the RAISE tool offers the possibility to perform combined verification by theorem proving and model checking [GH18].…”
Section: Related Workmentioning
confidence: 99%
“…-Variant 1) [15,12]. The engineering concept was originally developed by INSY GmbH Berlin for their railway control system RELIS 2000 designed for local railway networks.…”
Section: Distributed Interlocking As Distributed Mutual Exclusionmentioning
confidence: 99%
“…In [15] the concept has been formalised in the RAISE Specification Language, RSL [27], and the RAISE theorem prover was used for verification. In [12] an extension of RSL, called RSL-SAL [23] was used for the formalisation, and the formal verification was performed using the SAL symbolic model checker. -Variant 1) US patent 8820685 B2 [22].…”
Section: Distributed Interlocking As Distributed Mutual Exclusionmentioning
confidence: 99%