Strategies for Improving Reliability of Solder Joints on Power Semiconductor Devices

Abstract

There has been a significant research effort on area-array flip-chip solder joint technology in order to reduce package footprint, enhance current handling capability, and improve heat dissipation. However, there is a lingering concern over cyclic fatigue of solder alloys by thermo-mechanical stresses arising from mismatched thermal expansion coefficients of expansion among the various components of the package. In this paper, some strategies taken to improve the reliability of solder joints on power devices in single-device and multi-chip packages are presented. A strategy for improving solder joint reliability by adjusting solder joint geometry, underfilling and utilization of flexible substrates is discussed with emphasis on triple-stacked solder joints that resemble the shape of an hourglass. The hourglass shape relocates the highest inelastic strain away from the weaker interface with the chip to the bulk region of the joint while the underfill provides a load transfer from the joints. Flexible substrates can deform to relieve thermo-mechanical stresses. Thermal cycling data show significant improvements in reliability when these techniques are used. The design, testing, and finite-element analyses of an interconnection structure, termed the Dimple-Array Interconnect (DAI), for improving the solder joint reliability is also presented. In the DAI structure, a solder is used to join arrays of dimples pre-formed on a metal sheet onto the bonding pads of a device. Finite-element thermo-mechanical analyses and thermal cycling data show that the dimple-array solder joints are more fatigue-resistant than the conventional barrel-shaped solder joints in flip-chip IC packages.

Built-in Reliability Design of Highly Integrated Solid-State Power Switches With Metal Bump Interconnects

“…However, wire bonds have limited ability to dissipate heat and have relatively high parasitic inductance, which often restricts the thermal and electrical performance of the power modules. To overcome this problem, several replacements of wire bonds, such as ribbon bond [1], dimple array [2], embedded chip technology [3]- [5], silicon interposer [6], solder bump [7], metal bump [8]- [12], and press-pack bus-bar-like interconnects [13] have been proposed and investigated over the past years. Of them, metal bump interconnects, also called solid interconnect posts, have been demonstrated not only to obtain dramatic improvement in the thermal and electromagnetic performance, but also allow advanced integration schemes, e.g., stacked devices, for the optimization of basic power switch topologies, e.g., half bridge switch and bidirectional switch [14]- [16].…”

Isothermal low cycle fatigue behavior of nano-silver sintered single lap shear joint

“…Recently, the technical community has paid increasing attention on thermal management of packaging by developing highly conductive die attach materials. Because of the superior electrical and thermal performance and higher melting temperature than traditional tin-based solder alloys and conductive adhesives, nano-silver paste is introduced as a promising interconnection material to meet the stringent requirements of large heat dissipation and high temperature applications [2][3][4][5][6][7][8][9].…”

Improved Reliability of Planar Power Interconnect With Ceramic-Based Structure

“…Ultrasonically bonded Al wires in combination with soldered bus bars are generally used to achieve the interconnections. However, wire bonds and bus bars have limited ability to dissipate heat and have relatively high parasitic inductance which often restricts the thermal and electrical performance of the power module [2,3]. Furthermore, from the viewpoint of manufacturing, multiple soldering and wire bonding steps are not efficient and cost effective for assembling power modules which often have hundreds of wire bonds.…”

“…To overcome these problems for the development of high power density and high reliability power modules, several alternative packaging structures based on different interconnect technologies have been proposed and investigated. These interconnect technologies include ribbon bond [2], embedded chip technology [4,5], metal post-interconnect parallel-plate structure [1,6,7], dimple array interconnect [3], planar interconnect technology [8][9][10], pressure contact technology [11], flexible printed circuit board (PCB) based packaging technology [12][13][14] and press pack technology [15][16][17].…”