Streaming warper with cubic spline interpolation for rectification of distorted images on FPGAs

Abstract

For industrial print flaw detection images are acquired and then compared to a specimen (master image). Due to the production process, the images are not exactly aligned to each other. Therefore, preceding a pixel-by-pixel comparison, the acquired image has to be rectified in order to match the master image's properties -it has to be warped into the master image's coordinate system. To achieve the required detection speed, several Megapixels per second have to be processed. It proved to be very advantageous to continuously process the stream of image data in an image processing pipeline. The first stage is the warping process. In this paper we introduce a streaming warper unit which implements affine backward mapping and cubic spline interpolation. Since a complete pixel transformation is computed per clock cycle the performance -implemented on contemporary FPGA devices -can be up to 200 Megapixels per second. The implementation of several streaming warper units within a single FPGA is possible. This enables image processing systems which allow high data rates even under real-time constraints.