Study of electronic states located at the SiSiO2 interface and within the oxide volume of VLSI MOS capacitors using capacitance and conductance measurements

Abstract

Interface state parameters are studied in MOS capacitors with insulator thickness in the range from 10 to 30 nm obtained by different technological processes. Automatic capacitance and conductance measurements are performed in a frequency range from 200 Hz up to 40 kHz. The Gpω vs. to characteristics strongly deviate from those usually obtained with thick oxide layer. The results are interpreted using the two step model developed by Eaton and Sah for about 8 nm thick insulating layers. The most important physical parameters such as the density of interface states, the electron capture cross section, and the density of traps located within oxide are deduced.