Study of Fault Tolerance Methods for Hardware Implementations of Convolutional Neural Networks

Solovyev, Roman; Stempkovsky, A. L.; Telpukhov, Dmitry

doi:10.3103/s1060992x19020103

Cited by 7 publications

(3 citation statements)

References 2 publications

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“…a) Fault-aware training: In [213] and [91], it is demonstrated for ANNs and SNNs, respectively, that training with dropout improves the error-resilience. Dropout was originally proposed in [276] to prevent over-fitting and reduce the generalization error on unseen data.…”

Section: Model-basedmentioning

confidence: 99%

Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives

Liu

Stratigopoulos³

2023

IEEE Des. Test

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In recent years, there has been an expedited trend in embracing bold and radical innovation of computer architectures, aiming at the continuation of computing performance improvement despite the slowed-down physical device scaling. One new frontier in this field focuses on Artificial Intelligence (AI) hardware. While functionality of AI hardware still remains the main focus, testability and dependability of these new architectures need to be addressed before the mainstream adoption. This survey paper covers the state-of-the-art in research and development of dependability and testability solutions for AI hardware including digital or analog implementations of Artificial Neural Networks (ANNs) and Spiking Neural Networks (SNNs), used in accelerators and neuromorphic designs. Trends, challenges and perspectives are also discussed in this paper.

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Section: Model-basedmentioning

confidence: 99%

Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives

Liu

Stratigopoulos³

2023

IEEE Des. Test

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“…This feature is available in all major DNN frameworks. Some authors [9] have shown that dropout, during training, is effective at improving the fault tolerance of a DNN during inference, however this study was done on an abstract network using a small data-set.…”

Section: Output Stationary Architecture For Fault-tolerant Trainingmentioning

confidence: 99%

“…One modern and compact network, SqueezeNet [10], has been selected as our primary test case, as it is representative of the networks used in embedded applications. Since many, previous fault tolerance studies [7], [9], [11] have used VGG-16 [12] and LeNet-5, we have also included these two networks. VGG-16 is a large network with a huge number of weights, thus it inherently has more redundancy.…”

Section: A Selected Dnnsmentioning

confidence: 99%

MOZART: Masking Outputs with Zeros for Architectural Robustness and Testing of DNN Accelerators

Burel

Evans

Anghel

2021

2021 IEEE 27th International Symposium on on-Line Testing and Robust System Design (IOLTS)

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Deep Neural Networks (DNNs) are increasingly used in safety critical autonomous systems. In this paper, we present MOZART, a DNN accelerator architecture which provides fault detection and fault tolerance. MOZART is a systolic architecture based on the Output Stationary (OS) variant, as it is the one that inherently limits fault propagation. In addition, MOZART achieves fault detection with on-line functional testing of the Processing Elements (PEs). Faulty PEs are swiftly taken off-line with minimal classification impact. The implementation of our approach on Squeezenet results in a loss of accuracy of less than 3% in the presence of a single faulty PE, compared to 15-33% without mitigation. The area overhead for the test logic does not exceed 8%. Dropout during training further improves fault tolerance, without a priori knowledge of the faults.

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Real-time Object Detection with FPGA Using CenterNet

Solovyev

Telpukhov

Romanova

et al. 2021

2021 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (ElConRus)

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Study of Fault Tolerance Methods for Hardware Implementations of Convolutional Neural Networks

Cited by 7 publications

References 2 publications

Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives

Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives

MOZART: Masking Outputs with Zeros for Architectural Robustness and Testing of DNN Accelerators

Real-time Object Detection with FPGA Using CenterNet

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